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-rw-r--r--embassy-stm32/build.rs2
-rw-r--r--embassy-stm32/src/rcc/wba.rs27
-rw-r--r--embassy-stm32/src/usb/otg.rs2
-rw-r--r--examples/stm32wba/src/bin/pwm.rs3
4 files changed, 7 insertions, 27 deletions
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs
index 73860c64a..a4ed86bdf 100644
--- a/embassy-stm32/build.rs
+++ b/embassy-stm32/build.rs
@@ -1599,7 +1599,7 @@ fn main() {
1599 for e in rcc_registers.ir.enums { 1599 for e in rcc_registers.ir.enums {
1600 fn is_rcc_name(e: &str) -> bool { 1600 fn is_rcc_name(e: &str) -> bool {
1601 match e { 1601 match e {
1602 "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" => true, 1602 "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" | "Hpre5" => true,
1603 "Timpre" | "Pllrclkpre" => false, 1603 "Timpre" | "Pllrclkpre" => false,
1604 e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true, 1604 e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true,
1605 _ => false, 1605 _ => false,
diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs
index 0025d2a51..5f9d4d30a 100644
--- a/embassy-stm32/src/rcc/wba.rs
+++ b/embassy-stm32/src/rcc/wba.rs
@@ -1,6 +1,5 @@
1pub use crate::pac::pwr::vals::Vos as VoltageScale; 1pub use crate::pac::pwr::vals::Vos as VoltageScale;
2use crate::pac::rcc::regs::Cfgr1; 2use crate::pac::rcc::regs::Cfgr1;
3use core::ops::Div;
4pub use crate::pac::rcc::vals::{ 3pub use crate::pac::rcc::vals::{
5 Hpre as AHBPrescaler, Hsepre as HsePrescaler, Ppre as APBPrescaler, Sw as Sysclk, Pllsrc as PllSource, 4 Hpre as AHBPrescaler, Hsepre as HsePrescaler, Ppre as APBPrescaler, Sw as Sysclk, Pllsrc as PllSource,
6 Plldiv as PllDiv, Pllm as PllPreDiv, Plln as PllMul, Hpre5 as AHB5Prescaler, Hdiv5, 5 Plldiv as PllDiv, Pllm as PllPreDiv, Plln as PllMul, Hpre5 as AHB5Prescaler, Hdiv5,
@@ -21,23 +20,6 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000);
21// HSE speed 20// HSE speed
22pub const HSE_FREQ: Hertz = Hertz(32_000_000); 21pub const HSE_FREQ: Hertz = Hertz(32_000_000);
23 22
24// Allow dividing a Hertz value by an AHB5 prescaler directly
25impl Div<AHB5Prescaler> for Hertz {
26 type Output = Hertz;
27 fn div(self, rhs: AHB5Prescaler) -> Hertz {
28 // Map the prescaler enum to its integer divisor
29 let divisor = match rhs {
30 AHB5Prescaler::DIV1 => 1,
31 AHB5Prescaler::DIV2 => 2,
32 AHB5Prescaler::DIV3 => 3,
33 AHB5Prescaler::DIV4 => 4,
34 AHB5Prescaler::DIV6 => 6,
35 _ => unreachable!("Invalid AHB5 prescaler: {:?}", rhs),
36 };
37 Hertz(self.0 / divisor)
38 }
39}
40
41#[derive(Clone, Copy, Eq, PartialEq)] 23#[derive(Clone, Copy, Eq, PartialEq)]
42pub struct Hse { 24pub struct Hse {
43 pub prescaler: HsePrescaler, 25 pub prescaler: HsePrescaler,
@@ -95,8 +77,7 @@ pub struct Config {
95 pub apb7_pre: APBPrescaler, 77 pub apb7_pre: APBPrescaler,
96 78
97 // low speed LSI/LSE/RTC 79 // low speed LSI/LSE/RTC
98 pub lsi: super::LsConfig, 80 pub ls: super::LsConfig,
99 // pub lsi2: super::LsConfig,
100 81
101 pub voltage_scale: VoltageScale, 82 pub voltage_scale: VoltageScale,
102 83
@@ -116,7 +97,7 @@ impl Config {
116 apb1_pre: APBPrescaler::DIV1, 97 apb1_pre: APBPrescaler::DIV1,
117 apb2_pre: APBPrescaler::DIV1, 98 apb2_pre: APBPrescaler::DIV1,
118 apb7_pre: APBPrescaler::DIV1, 99 apb7_pre: APBPrescaler::DIV1,
119 lsi: crate::rcc::LsConfig::new(), 100 ls: crate::rcc::LsConfig::new(),
120 // lsi2: crate::rcc::LsConfig::new(), 101 // lsi2: crate::rcc::LsConfig::new(),
121 voltage_scale: VoltageScale::RANGE2, 102 voltage_scale: VoltageScale::RANGE2,
122 mux: super::mux::ClockMux::default(), 103 mux: super::mux::ClockMux::default(),
@@ -151,7 +132,7 @@ pub(crate) unsafe fn init(config: Config) {
151 crate::pac::PWR.vosr().write(|w| w.set_vos(config.voltage_scale)); 132 crate::pac::PWR.vosr().write(|w| w.set_vos(config.voltage_scale));
152 while !crate::pac::PWR.vosr().read().vosrdy() {} 133 while !crate::pac::PWR.vosr().read().vosrdy() {}
153 134
154 let rtc = config.lsi.init(); 135 let rtc = config.ls.init();
155 136
156 let hsi = config.hsi.then(|| { 137 let hsi = config.hsi.then(|| {
157 hsi_enable(); 138 hsi_enable();
@@ -276,7 +257,7 @@ pub(crate) unsafe fn init(config: Config) {
276 w.set_clksel(usb_refck_sel); 257 w.set_clksel(usb_refck_sel);
277 }); 258 });
278 259
279 let lsi = config.lsi.lsi.then_some(LSI_FREQ); 260 let lsi = config.ls.lsi.then_some(LSI_FREQ);
280 261
281 config.mux.init(); 262 config.mux.init();
282 263
diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs
index b074cfa1b..81e6bff4c 100644
--- a/embassy-stm32/src/usb/otg.rs
+++ b/embassy-stm32/src/usb/otg.rs
@@ -336,7 +336,7 @@ impl<'d, T: Instance> Bus<'d, T> {
336 critical_section::with(|_| { 336 critical_section::with(|_| {
337 crate::pac::RCC.ahb2enr().modify(|w| { 337 crate::pac::RCC.ahb2enr().modify(|w| {
338 w.set_usb_otg_hsen(true); 338 w.set_usb_otg_hsen(true);
339 w.set_otghsphyen(true); 339 w.set_usb_otg_hs_phyen(true);
340 }); 340 });
341 }); 341 });
342 } 342 }
diff --git a/examples/stm32wba/src/bin/pwm.rs b/examples/stm32wba/src/bin/pwm.rs
index 54d223d34..611d7c097 100644
--- a/examples/stm32wba/src/bin/pwm.rs
+++ b/examples/stm32wba/src/bin/pwm.rs
@@ -5,7 +5,7 @@ use defmt::*;
5use defmt_rtt as _; // global logger 5use defmt_rtt as _; // global logger
6use embassy_executor::Spawner; 6use embassy_executor::Spawner;
7use embassy_stm32::gpio::OutputType; 7use embassy_stm32::gpio::OutputType;
8use embassy_stm32::rcc::{mux, AHB5Prescaler, AHBPrescaler, APBPrescaler, Sysclk, VoltageScale}; 8use embassy_stm32::rcc::{AHB5Prescaler, AHBPrescaler, APBPrescaler, Sysclk, VoltageScale};
9use embassy_stm32::rcc::{PllDiv, PllMul, PllPreDiv, PllSource}; 9use embassy_stm32::rcc::{PllDiv, PllMul, PllPreDiv, PllSource};
10use embassy_stm32::time::khz; 10use embassy_stm32::time::khz;
11use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm}; 11use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm};
@@ -39,7 +39,6 @@ async fn main(_spawner: Spawner) {
39 // voltage scale for max performance 39 // voltage scale for max performance
40 config.rcc.voltage_scale = VoltageScale::RANGE1; 40 config.rcc.voltage_scale = VoltageScale::RANGE1;
41 // route PLL1_P into the USB‐OTG‐HS block 41 // route PLL1_P into the USB‐OTG‐HS block
42 config.rcc.mux.otghssel = mux::Otghssel::PLL1_P;
43 config.rcc.sys = Sysclk::PLL1_R; 42 config.rcc.sys = Sysclk::PLL1_R;
44 43
45 let p = embassy_stm32::init(config); 44 let p = embassy_stm32::init(config);