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-rw-r--r--embassy-stm32/src/spi/v3.rs24
1 files changed, 24 insertions, 0 deletions
diff --git a/embassy-stm32/src/spi/v3.rs b/embassy-stm32/src/spi/v3.rs
index cfee54dac..b0e57254e 100644
--- a/embassy-stm32/src/spi/v3.rs
+++ b/embassy-stm32/src/spi/v3.rs
@@ -171,6 +171,7 @@ impl<'d, T: Instance, Tx, Rx> Spi<'d, T, Tx, Rx> {
171 w.set_dsize(word_size.dsize()); 171 w.set_dsize(word_size.dsize());
172 }); 172 });
173 T::regs().cr1().modify(|w| { 173 T::regs().cr1().modify(|w| {
174 w.set_csusp(false);
174 w.set_spe(true); 175 w.set_spe(true);
175 }); 176 });
176 } 177 }
@@ -375,10 +376,21 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u8> for Spi<'d, T, NoDm
375 } 376 }
376 if !sr.txp() { 377 if !sr.txp() {
377 // loop waiting for TXE 378 // loop waiting for TXE
379 continue;
378 } 380 }
381 break;
382 }
383 unsafe {
384 let rxdr = regs.rxdr().ptr() as *const u8;
385 // discard read to prevent pverrun.
386 let _ = ptr::read_volatile(rxdr);
379 } 387 }
380 } 388 }
381 389
390 while unsafe { !regs.sr().read().txc() } {
391 // spin
392 }
393
382 Ok(()) 394 Ok(())
383 } 395 }
384} 396}
@@ -469,8 +481,20 @@ impl<'d, T: Instance> embedded_hal::blocking::spi::Write<u16> for Spi<'d, T, NoD
469 } 481 }
470 if !sr.txp() { 482 if !sr.txp() {
471 // loop waiting for TXE 483 // loop waiting for TXE
484 continue;
472 } 485 }
486 break;
473 } 487 }
488
489 unsafe {
490 let rxdr = regs.rxdr().ptr() as *const u8;
491 // discard read to prevent pverrun.
492 let _ = ptr::read_volatile(rxdr);
493 }
494 }
495
496 while unsafe { !regs.sr().read().txc() } {
497 // spin
474 } 498 }
475 499
476 Ok(()) 500 Ok(())