diff options
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 53 |
1 files changed, 47 insertions, 6 deletions
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 7122930f5..dedc390f0 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -5,6 +5,7 @@ use embassy_hal_common::{into_ref, PeripheralRef}; | |||
| 5 | use crate::dma::{AnyChannel, Channel}; | 5 | use crate::dma::{AnyChannel, Channel}; |
| 6 | use crate::gpio::sealed::Pin; | 6 | use crate::gpio::sealed::Pin; |
| 7 | use crate::gpio::AnyPin; | 7 | use crate::gpio::AnyPin; |
| 8 | use crate::pac::io::vals::{Inover, Outover}; | ||
| 8 | use crate::{pac, peripherals, Peripheral}; | 9 | use crate::{pac, peripherals, Peripheral}; |
| 9 | 10 | ||
| 10 | #[cfg(feature = "nightly")] | 11 | #[cfg(feature = "nightly")] |
| @@ -53,6 +54,14 @@ pub struct Config { | |||
| 53 | pub data_bits: DataBits, | 54 | pub data_bits: DataBits, |
| 54 | pub stop_bits: StopBits, | 55 | pub stop_bits: StopBits, |
| 55 | pub parity: Parity, | 56 | pub parity: Parity, |
| 57 | /// Invert the tx pin output | ||
| 58 | pub invert_tx: bool, | ||
| 59 | /// Invert the rx pin input | ||
| 60 | pub invert_rx: bool, | ||
| 61 | // Invert the rts pin | ||
| 62 | pub invert_rts: bool, | ||
| 63 | // Invert the cts pin | ||
| 64 | pub invert_cts: bool, | ||
| 56 | } | 65 | } |
| 57 | 66 | ||
| 58 | impl Default for Config { | 67 | impl Default for Config { |
| @@ -62,6 +71,10 @@ impl Default for Config { | |||
| 62 | data_bits: DataBits::DataBits8, | 71 | data_bits: DataBits::DataBits8, |
| 63 | stop_bits: StopBits::STOP1, | 72 | stop_bits: StopBits::STOP1, |
| 64 | parity: Parity::ParityNone, | 73 | parity: Parity::ParityNone, |
| 74 | invert_rx: false, | ||
| 75 | invert_tx: false, | ||
| 76 | invert_rts: false, | ||
| 77 | invert_cts: false, | ||
| 65 | } | 78 | } |
| 66 | } | 79 | } |
| 67 | } | 80 | } |
| @@ -167,7 +180,7 @@ impl<'d, T: Instance> UartTx<'d, T, Async> { | |||
| 167 | } | 180 | } |
| 168 | 181 | ||
| 169 | impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> { | 182 | impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> { |
| 170 | /// Create a new DMA-enabled UART which can only send data | 183 | /// Create a new DMA-enabled UART which can only recieve data |
| 171 | pub fn new( | 184 | pub fn new( |
| 172 | _uart: impl Peripheral<P = T> + 'd, | 185 | _uart: impl Peripheral<P = T> + 'd, |
| 173 | rx: impl Peripheral<P = impl RxPin<T>> + 'd, | 186 | rx: impl Peripheral<P = impl RxPin<T>> + 'd, |
| @@ -175,7 +188,7 @@ impl<'d, T: Instance, M: Mode> UartRx<'d, T, M> { | |||
| 175 | config: Config, | 188 | config: Config, |
| 176 | ) -> Self { | 189 | ) -> Self { |
| 177 | into_ref!(rx, rx_dma); | 190 | into_ref!(rx, rx_dma); |
| 178 | Uart::<T, M>::init(Some(rx.map_into()), None, None, None, config); | 191 | Uart::<T, M>::init(None, Some(rx.map_into()), None, None, config); |
| 179 | Self::new_inner(Some(rx_dma.map_into())) | 192 | Self::new_inner(Some(rx_dma.map_into())) |
| 180 | } | 193 | } |
| 181 | 194 | ||
| @@ -381,19 +394,47 @@ impl<'d, T: Instance + 'd, M: Mode> Uart<'d, T, M> { | |||
| 381 | let r = T::regs(); | 394 | let r = T::regs(); |
| 382 | unsafe { | 395 | unsafe { |
| 383 | if let Some(pin) = &tx { | 396 | if let Some(pin) = &tx { |
| 384 | pin.io().ctrl().write(|w| w.set_funcsel(2)); | 397 | pin.io().ctrl().write(|w| { |
| 398 | w.set_funcsel(2); | ||
| 399 | w.set_outover(if config.invert_tx { | ||
| 400 | Outover::INVERT | ||
| 401 | } else { | ||
| 402 | Outover::NORMAL | ||
| 403 | }); | ||
| 404 | }); | ||
| 385 | pin.pad_ctrl().write(|w| w.set_ie(true)); | 405 | pin.pad_ctrl().write(|w| w.set_ie(true)); |
| 386 | } | 406 | } |
| 387 | if let Some(pin) = &rx { | 407 | if let Some(pin) = &rx { |
| 388 | pin.io().ctrl().write(|w| w.set_funcsel(2)); | 408 | pin.io().ctrl().write(|w| { |
| 409 | w.set_funcsel(2); | ||
| 410 | w.set_inover(if config.invert_rx { | ||
| 411 | Inover::INVERT | ||
| 412 | } else { | ||
| 413 | Inover::NORMAL | ||
| 414 | }); | ||
| 415 | }); | ||
| 389 | pin.pad_ctrl().write(|w| w.set_ie(true)); | 416 | pin.pad_ctrl().write(|w| w.set_ie(true)); |
| 390 | } | 417 | } |
| 391 | if let Some(pin) = &cts { | 418 | if let Some(pin) = &cts { |
| 392 | pin.io().ctrl().write(|w| w.set_funcsel(2)); | 419 | pin.io().ctrl().write(|w| { |
| 420 | w.set_funcsel(2); | ||
| 421 | w.set_inover(if config.invert_cts { | ||
| 422 | Inover::INVERT | ||
| 423 | } else { | ||
| 424 | Inover::NORMAL | ||
| 425 | }); | ||
| 426 | }); | ||
| 393 | pin.pad_ctrl().write(|w| w.set_ie(true)); | 427 | pin.pad_ctrl().write(|w| w.set_ie(true)); |
| 394 | } | 428 | } |
| 395 | if let Some(pin) = &rts { | 429 | if let Some(pin) = &rts { |
| 396 | pin.io().ctrl().write(|w| w.set_funcsel(2)); | 430 | pin.io().ctrl().write(|w| { |
| 431 | w.set_funcsel(2); | ||
| 432 | w.set_outover(if config.invert_rts { | ||
| 433 | Outover::INVERT | ||
| 434 | } else { | ||
| 435 | Outover::NORMAL | ||
| 436 | }); | ||
| 437 | }); | ||
| 397 | pin.pad_ctrl().write(|w| w.set_ie(true)); | 438 | pin.pad_ctrl().write(|w| w.set_ie(true)); |
| 398 | } | 439 | } |
| 399 | 440 | ||
