diff options
| -rw-r--r-- | embassy-stm32/src/usart/buffered.rs | 38 | ||||
| -rw-r--r-- | embassy-stm32/src/usart/mod.rs | 136 | ||||
| -rw-r--r-- | examples/stm32g0/src/bin/onewire_ds18b20.rs | 13 |
3 files changed, 91 insertions, 96 deletions
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 8a33a152c..06d5f7528 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs | |||
| @@ -13,10 +13,10 @@ use embassy_sync::waitqueue::AtomicWaker; | |||
| 13 | use super::DePin; | 13 | use super::DePin; |
| 14 | use super::{ | 14 | use super::{ |
| 15 | clear_interrupt_flags, configure, half_duplex_set_rx_tx_before_write, rdr, reconfigure, send_break, set_baudrate, | 15 | clear_interrupt_flags, configure, half_duplex_set_rx_tx_before_write, rdr, reconfigure, send_break, set_baudrate, |
| 16 | sr, tdr, Config, ConfigError, CtsPin, Duplex, Error, HalfDuplexConfig, HalfDuplexReadback, Info, Instance, Regs, | 16 | sr, tdr, Config, ConfigError, CtsPin, Duplex, Error, HalfDuplexReadback, Info, Instance, Regs, RtsPin, RxPin, |
| 17 | RtsPin, RxPin, TxPin, | 17 | TxPin, |
| 18 | }; | 18 | }; |
| 19 | use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; | 19 | use crate::gpio::{AfType, AnyPin, Pull, SealedPin as _}; |
| 20 | use crate::interrupt::{self, InterruptExt}; | 20 | use crate::interrupt::{self, InterruptExt}; |
| 21 | use crate::time::Hertz; | 21 | use crate::time::Hertz; |
| 22 | 22 | ||
| @@ -217,8 +217,8 @@ impl<'d> BufferedUart<'d> { | |||
| 217 | ) -> Result<Self, ConfigError> { | 217 | ) -> Result<Self, ConfigError> { |
| 218 | Self::new_inner( | 218 | Self::new_inner( |
| 219 | peri, | 219 | peri, |
| 220 | new_pin!(rx, AfType::input(config.rx_pull)), | 220 | new_pin!(rx, config.rx_af()), |
| 221 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 221 | new_pin!(tx, config.tx_af()), |
| 222 | None, | 222 | None, |
| 223 | None, | 223 | None, |
| 224 | None, | 224 | None, |
| @@ -242,10 +242,10 @@ impl<'d> BufferedUart<'d> { | |||
| 242 | ) -> Result<Self, ConfigError> { | 242 | ) -> Result<Self, ConfigError> { |
| 243 | Self::new_inner( | 243 | Self::new_inner( |
| 244 | peri, | 244 | peri, |
| 245 | new_pin!(rx, AfType::input(Pull::None)), | 245 | new_pin!(rx, config.rx_af()), |
| 246 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 246 | new_pin!(tx, config.tx_af()), |
| 247 | new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), | 247 | new_pin!(rts, config.rts_config.af_type()), |
| 248 | new_pin!(cts, AfType::input(Pull::None)), | 248 | new_pin!(cts, AfType::input(config.cts_pull)), |
| 249 | None, | 249 | None, |
| 250 | tx_buffer, | 250 | tx_buffer, |
| 251 | rx_buffer, | 251 | rx_buffer, |
| @@ -266,8 +266,8 @@ impl<'d> BufferedUart<'d> { | |||
| 266 | ) -> Result<Self, ConfigError> { | 266 | ) -> Result<Self, ConfigError> { |
| 267 | Self::new_inner( | 267 | Self::new_inner( |
| 268 | peri, | 268 | peri, |
| 269 | new_pin!(rx, AfType::input(Pull::None)), | 269 | new_pin!(rx, config.rx_af()), |
| 270 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 270 | new_pin!(tx, config.tx_af()), |
| 271 | None, | 271 | None, |
| 272 | None, | 272 | None, |
| 273 | new_pin!(rts, AfType::input(Pull::None)), // RTS mapped used as DE | 273 | new_pin!(rts, AfType::input(Pull::None)), // RTS mapped used as DE |
| @@ -290,8 +290,8 @@ impl<'d> BufferedUart<'d> { | |||
| 290 | ) -> Result<Self, ConfigError> { | 290 | ) -> Result<Self, ConfigError> { |
| 291 | Self::new_inner( | 291 | Self::new_inner( |
| 292 | peri, | 292 | peri, |
| 293 | new_pin!(rx, AfType::input(Pull::None)), | 293 | new_pin!(rx, config.rx_af()), |
| 294 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 294 | new_pin!(tx, config.tx_af()), |
| 295 | new_pin!(rts, AfType::input(Pull::None)), | 295 | new_pin!(rts, AfType::input(Pull::None)), |
| 296 | None, // no CTS | 296 | None, // no CTS |
| 297 | None, // no DE | 297 | None, // no DE |
| @@ -315,11 +315,11 @@ impl<'d> BufferedUart<'d> { | |||
| 315 | ) -> Result<Self, ConfigError> { | 315 | ) -> Result<Self, ConfigError> { |
| 316 | Self::new_inner( | 316 | Self::new_inner( |
| 317 | peri, | 317 | peri, |
| 318 | new_pin!(rx, AfType::input(config.rx_pull)), | 318 | new_pin!(rx, config.rx_af()), |
| 319 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 319 | new_pin!(tx, config.tx_af()), |
| 320 | None, | 320 | None, |
| 321 | None, | 321 | None, |
| 322 | new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), | 322 | new_pin!(de, config.de_config.af_type()), |
| 323 | tx_buffer, | 323 | tx_buffer, |
| 324 | rx_buffer, | 324 | rx_buffer, |
| 325 | config, | 325 | config, |
| @@ -346,7 +346,6 @@ impl<'d> BufferedUart<'d> { | |||
| 346 | rx_buffer: &'d mut [u8], | 346 | rx_buffer: &'d mut [u8], |
| 347 | mut config: Config, | 347 | mut config: Config, |
| 348 | readback: HalfDuplexReadback, | 348 | readback: HalfDuplexReadback, |
| 349 | half_duplex: HalfDuplexConfig, | ||
| 350 | ) -> Result<Self, ConfigError> { | 349 | ) -> Result<Self, ConfigError> { |
| 351 | #[cfg(not(any(usart_v1, usart_v2)))] | 350 | #[cfg(not(any(usart_v1, usart_v2)))] |
| 352 | { | 351 | { |
| @@ -357,7 +356,7 @@ impl<'d> BufferedUart<'d> { | |||
| 357 | Self::new_inner( | 356 | Self::new_inner( |
| 358 | peri, | 357 | peri, |
| 359 | None, | 358 | None, |
| 360 | new_pin!(tx, half_duplex.af_type()), | 359 | new_pin!(tx, config.tx_af()), |
| 361 | None, | 360 | None, |
| 362 | None, | 361 | None, |
| 363 | None, | 362 | None, |
| @@ -386,14 +385,13 @@ impl<'d> BufferedUart<'d> { | |||
| 386 | rx_buffer: &'d mut [u8], | 385 | rx_buffer: &'d mut [u8], |
| 387 | mut config: Config, | 386 | mut config: Config, |
| 388 | readback: HalfDuplexReadback, | 387 | readback: HalfDuplexReadback, |
| 389 | half_duplex: HalfDuplexConfig, | ||
| 390 | ) -> Result<Self, ConfigError> { | 388 | ) -> Result<Self, ConfigError> { |
| 391 | config.swap_rx_tx = true; | 389 | config.swap_rx_tx = true; |
| 392 | config.duplex = Duplex::Half(readback); | 390 | config.duplex = Duplex::Half(readback); |
| 393 | 391 | ||
| 394 | Self::new_inner( | 392 | Self::new_inner( |
| 395 | peri, | 393 | peri, |
| 396 | new_pin!(rx, half_duplex.af_type()), | 394 | new_pin!(rx, config.rx_af()), |
| 397 | None, | 395 | None, |
| 398 | None, | 396 | None, |
| 399 | None, | 397 | None, |
diff --git a/embassy-stm32/src/usart/mod.rs b/embassy-stm32/src/usart/mod.rs index 10e3ea88b..b3f8bc00c 100644 --- a/embassy-stm32/src/usart/mod.rs +++ b/embassy-stm32/src/usart/mod.rs | |||
| @@ -14,7 +14,7 @@ use embassy_sync::waitqueue::AtomicWaker; | |||
| 14 | use futures_util::future::{select, Either}; | 14 | use futures_util::future::{select, Either}; |
| 15 | 15 | ||
| 16 | use crate::dma::ChannelAndRequest; | 16 | use crate::dma::ChannelAndRequest; |
| 17 | use crate::gpio::{self, AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; | 17 | use crate::gpio::{AfType, AnyPin, OutputType, Pull, SealedPin as _, Speed}; |
| 18 | use crate::interrupt::typelevel::Interrupt as _; | 18 | use crate::interrupt::typelevel::Interrupt as _; |
| 19 | use crate::interrupt::{self, Interrupt, InterruptExt}; | 19 | use crate::interrupt::{self, Interrupt, InterruptExt}; |
| 20 | use crate::mode::{Async, Blocking, Mode}; | 20 | use crate::mode::{Async, Blocking, Mode}; |
| @@ -133,6 +133,30 @@ pub enum HalfDuplexReadback { | |||
| 133 | 133 | ||
| 134 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] | 134 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] |
| 135 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 135 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| 136 | /// Half duplex IO mode | ||
| 137 | pub enum OutputConfig { | ||
| 138 | /// Push pull allows for faster baudrates, no internal pullup | ||
| 139 | PushPull, | ||
| 140 | /// Open drain output (external pull up needed) | ||
| 141 | OpenDrain, | ||
| 142 | #[cfg(not(gpio_v1))] | ||
| 143 | /// Open drain output with internal pull up resistor | ||
| 144 | OpenDrainPullUp, | ||
| 145 | } | ||
| 146 | |||
| 147 | impl OutputConfig { | ||
| 148 | const fn af_type(self) -> AfType { | ||
| 149 | match self { | ||
| 150 | OutputConfig::PushPull => AfType::output(OutputType::PushPull, Speed::Medium), | ||
| 151 | OutputConfig::OpenDrain => AfType::output(OutputType::OpenDrain, Speed::Medium), | ||
| 152 | #[cfg(not(gpio_v1))] | ||
| 153 | OutputConfig::OpenDrainPullUp => AfType::output_pull(OutputType::OpenDrain, Speed::Medium, Pull::Up), | ||
| 154 | } | ||
| 155 | } | ||
| 156 | } | ||
| 157 | |||
| 158 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] | ||
| 159 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | ||
| 136 | /// Duplex mode | 160 | /// Duplex mode |
| 137 | pub enum Duplex { | 161 | pub enum Duplex { |
| 138 | /// Full duplex | 162 | /// Full duplex |
| @@ -203,6 +227,18 @@ pub struct Config { | |||
| 203 | /// Set the pull configuration for the RX pin. | 227 | /// Set the pull configuration for the RX pin. |
| 204 | pub rx_pull: Pull, | 228 | pub rx_pull: Pull, |
| 205 | 229 | ||
| 230 | /// Set the pull configuration for the CTS pin. | ||
| 231 | pub cts_pull: Pull, | ||
| 232 | |||
| 233 | /// Set the pin configuration for the TX pin. | ||
| 234 | pub tx_config: OutputConfig, | ||
| 235 | |||
| 236 | /// Set the pin configuration for the RTS pin. | ||
| 237 | pub rts_config: OutputConfig, | ||
| 238 | |||
| 239 | /// Set the pin configuration for the DE pin. | ||
| 240 | pub de_config: OutputConfig, | ||
| 241 | |||
| 206 | // private: set by new_half_duplex, not by the user. | 242 | // private: set by new_half_duplex, not by the user. |
| 207 | duplex: Duplex, | 243 | duplex: Duplex, |
| 208 | } | 244 | } |
| @@ -213,13 +249,13 @@ impl Config { | |||
| 213 | if self.swap_rx_tx { | 249 | if self.swap_rx_tx { |
| 214 | return AfType::input(self.rx_pull); | 250 | return AfType::input(self.rx_pull); |
| 215 | }; | 251 | }; |
| 216 | AfType::output(OutputType::PushPull, Speed::Medium) | 252 | self.tx_config.af_type() |
| 217 | } | 253 | } |
| 218 | 254 | ||
| 219 | fn rx_af(&self) -> AfType { | 255 | fn rx_af(&self) -> AfType { |
| 220 | #[cfg(any(usart_v3, usart_v4))] | 256 | #[cfg(any(usart_v3, usart_v4))] |
| 221 | if self.swap_rx_tx { | 257 | if self.swap_rx_tx { |
| 222 | return AfType::output(OutputType::PushPull, Speed::Medium); | 258 | return self.tx_config.af_type(); |
| 223 | }; | 259 | }; |
| 224 | AfType::input(self.rx_pull) | 260 | AfType::input(self.rx_pull) |
| 225 | } | 261 | } |
| @@ -243,35 +279,15 @@ impl Default for Config { | |||
| 243 | #[cfg(any(usart_v3, usart_v4))] | 279 | #[cfg(any(usart_v3, usart_v4))] |
| 244 | invert_rx: false, | 280 | invert_rx: false, |
| 245 | rx_pull: Pull::None, | 281 | rx_pull: Pull::None, |
| 282 | cts_pull: Pull::None, | ||
| 283 | tx_config: OutputConfig::PushPull, | ||
| 284 | rts_config: OutputConfig::PushPull, | ||
| 285 | de_config: OutputConfig::PushPull, | ||
| 246 | duplex: Duplex::Full, | 286 | duplex: Duplex::Full, |
| 247 | } | 287 | } |
| 248 | } | 288 | } |
| 249 | } | 289 | } |
| 250 | 290 | ||
| 251 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] | ||
| 252 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | ||
| 253 | /// Half duplex IO mode | ||
| 254 | pub enum HalfDuplexConfig { | ||
| 255 | /// Push pull allows for faster baudrates, may require series resistor | ||
| 256 | PushPull, | ||
| 257 | /// Open drain output using external pull up resistor | ||
| 258 | OpenDrainExternal, | ||
| 259 | #[cfg(not(gpio_v1))] | ||
| 260 | /// Open drain output using internal pull up resistor | ||
| 261 | OpenDrainInternal, | ||
| 262 | } | ||
| 263 | |||
| 264 | impl HalfDuplexConfig { | ||
| 265 | fn af_type(self) -> gpio::AfType { | ||
| 266 | match self { | ||
| 267 | HalfDuplexConfig::PushPull => AfType::output(OutputType::PushPull, Speed::Medium), | ||
| 268 | HalfDuplexConfig::OpenDrainExternal => AfType::output(OutputType::OpenDrain, Speed::Medium), | ||
| 269 | #[cfg(not(gpio_v1))] | ||
| 270 | HalfDuplexConfig::OpenDrainInternal => AfType::output_pull(OutputType::OpenDrain, Speed::Medium, Pull::Up), | ||
| 271 | } | ||
| 272 | } | ||
| 273 | } | ||
| 274 | |||
| 275 | /// Serial error | 291 | /// Serial error |
| 276 | #[derive(Debug, Eq, PartialEq, Copy, Clone)] | 292 | #[derive(Debug, Eq, PartialEq, Copy, Clone)] |
| 277 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 293 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| @@ -419,13 +435,7 @@ impl<'d> UartTx<'d, Async> { | |||
| 419 | tx_dma: Peri<'d, impl TxDma<T>>, | 435 | tx_dma: Peri<'d, impl TxDma<T>>, |
| 420 | config: Config, | 436 | config: Config, |
| 421 | ) -> Result<Self, ConfigError> { | 437 | ) -> Result<Self, ConfigError> { |
| 422 | Self::new_inner( | 438 | Self::new_inner(peri, new_pin!(tx, config.tx_af()), None, new_dma!(tx_dma), config) |
| 423 | peri, | ||
| 424 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | ||
| 425 | None, | ||
| 426 | new_dma!(tx_dma), | ||
| 427 | config, | ||
| 428 | ) | ||
| 429 | } | 439 | } |
| 430 | 440 | ||
| 431 | /// Create a new tx-only UART with a clear-to-send pin | 441 | /// Create a new tx-only UART with a clear-to-send pin |
| @@ -438,8 +448,8 @@ impl<'d> UartTx<'d, Async> { | |||
| 438 | ) -> Result<Self, ConfigError> { | 448 | ) -> Result<Self, ConfigError> { |
| 439 | Self::new_inner( | 449 | Self::new_inner( |
| 440 | peri, | 450 | peri, |
| 441 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 451 | new_pin!(tx, config.tx_af()), |
| 442 | new_pin!(cts, AfType::input(Pull::None)), | 452 | new_pin!(cts, AfType::input(config.cts_pull)), |
| 443 | new_dma!(tx_dma), | 453 | new_dma!(tx_dma), |
| 444 | config, | 454 | config, |
| 445 | ) | 455 | ) |
| @@ -477,13 +487,7 @@ impl<'d> UartTx<'d, Blocking> { | |||
| 477 | tx: Peri<'d, impl TxPin<T>>, | 487 | tx: Peri<'d, impl TxPin<T>>, |
| 478 | config: Config, | 488 | config: Config, |
| 479 | ) -> Result<Self, ConfigError> { | 489 | ) -> Result<Self, ConfigError> { |
| 480 | Self::new_inner( | 490 | Self::new_inner(peri, new_pin!(tx, config.tx_af()), None, None, config) |
| 481 | peri, | ||
| 482 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | ||
| 483 | None, | ||
| 484 | None, | ||
| 485 | config, | ||
| 486 | ) | ||
| 487 | } | 491 | } |
| 488 | 492 | ||
| 489 | /// Create a new blocking tx-only UART with a clear-to-send pin | 493 | /// Create a new blocking tx-only UART with a clear-to-send pin |
| @@ -495,8 +499,8 @@ impl<'d> UartTx<'d, Blocking> { | |||
| 495 | ) -> Result<Self, ConfigError> { | 499 | ) -> Result<Self, ConfigError> { |
| 496 | Self::new_inner( | 500 | Self::new_inner( |
| 497 | peri, | 501 | peri, |
| 498 | new_pin!(tx, AfType::output(OutputType::PushPull, Speed::Medium)), | 502 | new_pin!(tx, config.tx_af()), |
| 499 | new_pin!(cts, AfType::input(config.rx_pull)), | 503 | new_pin!(cts, AfType::input(config.cts_pull)), |
| 500 | None, | 504 | None, |
| 501 | config, | 505 | config, |
| 502 | ) | 506 | ) |
| @@ -651,13 +655,7 @@ impl<'d> UartRx<'d, Async> { | |||
| 651 | rx_dma: Peri<'d, impl RxDma<T>>, | 655 | rx_dma: Peri<'d, impl RxDma<T>>, |
| 652 | config: Config, | 656 | config: Config, |
| 653 | ) -> Result<Self, ConfigError> { | 657 | ) -> Result<Self, ConfigError> { |
| 654 | Self::new_inner( | 658 | Self::new_inner(peri, new_pin!(rx, config.rx_af()), None, new_dma!(rx_dma), config) |
| 655 | peri, | ||
| 656 | new_pin!(rx, AfType::input(config.rx_pull)), | ||
| 657 | None, | ||
| 658 | new_dma!(rx_dma), | ||
| 659 | config, | ||
| 660 | ) | ||
| 661 | } | 659 | } |
| 662 | 660 | ||
| 663 | /// Create a new rx-only UART with a request-to-send pin | 661 | /// Create a new rx-only UART with a request-to-send pin |
| @@ -671,8 +669,8 @@ impl<'d> UartRx<'d, Async> { | |||
| 671 | ) -> Result<Self, ConfigError> { | 669 | ) -> Result<Self, ConfigError> { |
| 672 | Self::new_inner( | 670 | Self::new_inner( |
| 673 | peri, | 671 | peri, |
| 674 | new_pin!(rx, AfType::input(config.rx_pull)), | 672 | new_pin!(rx, config.rx_af()), |
| 675 | new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), | 673 | new_pin!(rts, config.rts_config.af_type()), |
| 676 | new_dma!(rx_dma), | 674 | new_dma!(rx_dma), |
| 677 | config, | 675 | config, |
| 678 | ) | 676 | ) |
| @@ -906,7 +904,7 @@ impl<'d> UartRx<'d, Blocking> { | |||
| 906 | rx: Peri<'d, impl RxPin<T>>, | 904 | rx: Peri<'d, impl RxPin<T>>, |
| 907 | config: Config, | 905 | config: Config, |
| 908 | ) -> Result<Self, ConfigError> { | 906 | ) -> Result<Self, ConfigError> { |
| 909 | Self::new_inner(peri, new_pin!(rx, AfType::input(config.rx_pull)), None, None, config) | 907 | Self::new_inner(peri, new_pin!(rx, config.rx_af()), None, None, config) |
| 910 | } | 908 | } |
| 911 | 909 | ||
| 912 | /// Create a new rx-only UART with a request-to-send pin | 910 | /// Create a new rx-only UART with a request-to-send pin |
| @@ -918,8 +916,8 @@ impl<'d> UartRx<'d, Blocking> { | |||
| 918 | ) -> Result<Self, ConfigError> { | 916 | ) -> Result<Self, ConfigError> { |
| 919 | Self::new_inner( | 917 | Self::new_inner( |
| 920 | peri, | 918 | peri, |
| 921 | new_pin!(rx, AfType::input(config.rx_pull)), | 919 | new_pin!(rx, config.rx_af()), |
| 922 | new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), | 920 | new_pin!(rts, config.rts_config.af_type()), |
| 923 | None, | 921 | None, |
| 924 | config, | 922 | config, |
| 925 | ) | 923 | ) |
| @@ -1135,8 +1133,8 @@ impl<'d> Uart<'d, Async> { | |||
| 1135 | peri, | 1133 | peri, |
| 1136 | new_pin!(rx, config.rx_af()), | 1134 | new_pin!(rx, config.rx_af()), |
| 1137 | new_pin!(tx, config.tx_af()), | 1135 | new_pin!(tx, config.tx_af()), |
| 1138 | new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), | 1136 | new_pin!(rts, config.rts_config.af_type()), |
| 1139 | new_pin!(cts, AfType::input(Pull::None)), | 1137 | new_pin!(cts, AfType::input(config.cts_pull)), |
| 1140 | None, | 1138 | None, |
| 1141 | new_dma!(tx_dma), | 1139 | new_dma!(tx_dma), |
| 1142 | new_dma!(rx_dma), | 1140 | new_dma!(rx_dma), |
| @@ -1162,7 +1160,7 @@ impl<'d> Uart<'d, Async> { | |||
| 1162 | new_pin!(tx, config.tx_af()), | 1160 | new_pin!(tx, config.tx_af()), |
| 1163 | None, | 1161 | None, |
| 1164 | None, | 1162 | None, |
| 1165 | new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), | 1163 | new_pin!(de, config.de_config.af_type()), |
| 1166 | new_dma!(tx_dma), | 1164 | new_dma!(tx_dma), |
| 1167 | new_dma!(rx_dma), | 1165 | new_dma!(rx_dma), |
| 1168 | config, | 1166 | config, |
| @@ -1189,7 +1187,6 @@ impl<'d> Uart<'d, Async> { | |||
| 1189 | rx_dma: Peri<'d, impl RxDma<T>>, | 1187 | rx_dma: Peri<'d, impl RxDma<T>>, |
| 1190 | mut config: Config, | 1188 | mut config: Config, |
| 1191 | readback: HalfDuplexReadback, | 1189 | readback: HalfDuplexReadback, |
| 1192 | half_duplex: HalfDuplexConfig, | ||
| 1193 | ) -> Result<Self, ConfigError> { | 1190 | ) -> Result<Self, ConfigError> { |
| 1194 | #[cfg(not(any(usart_v1, usart_v2)))] | 1191 | #[cfg(not(any(usart_v1, usart_v2)))] |
| 1195 | { | 1192 | { |
| @@ -1200,7 +1197,7 @@ impl<'d> Uart<'d, Async> { | |||
| 1200 | Self::new_inner( | 1197 | Self::new_inner( |
| 1201 | peri, | 1198 | peri, |
| 1202 | None, | 1199 | None, |
| 1203 | new_pin!(tx, half_duplex.af_type()), | 1200 | new_pin!(tx, config.tx_af()), |
| 1204 | None, | 1201 | None, |
| 1205 | None, | 1202 | None, |
| 1206 | None, | 1203 | None, |
| @@ -1229,7 +1226,6 @@ impl<'d> Uart<'d, Async> { | |||
| 1229 | rx_dma: Peri<'d, impl RxDma<T>>, | 1226 | rx_dma: Peri<'d, impl RxDma<T>>, |
| 1230 | mut config: Config, | 1227 | mut config: Config, |
| 1231 | readback: HalfDuplexReadback, | 1228 | readback: HalfDuplexReadback, |
| 1232 | half_duplex: HalfDuplexConfig, | ||
| 1233 | ) -> Result<Self, ConfigError> { | 1229 | ) -> Result<Self, ConfigError> { |
| 1234 | config.swap_rx_tx = true; | 1230 | config.swap_rx_tx = true; |
| 1235 | config.duplex = Duplex::Half(readback); | 1231 | config.duplex = Duplex::Half(readback); |
| @@ -1238,7 +1234,7 @@ impl<'d> Uart<'d, Async> { | |||
| 1238 | peri, | 1234 | peri, |
| 1239 | None, | 1235 | None, |
| 1240 | None, | 1236 | None, |
| 1241 | new_pin!(rx, half_duplex.af_type()), | 1237 | new_pin!(rx, config.rx_af()), |
| 1242 | None, | 1238 | None, |
| 1243 | None, | 1239 | None, |
| 1244 | new_dma!(tx_dma), | 1240 | new_dma!(tx_dma), |
| @@ -1302,8 +1298,8 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1302 | peri, | 1298 | peri, |
| 1303 | new_pin!(rx, config.rx_af()), | 1299 | new_pin!(rx, config.rx_af()), |
| 1304 | new_pin!(tx, config.tx_af()), | 1300 | new_pin!(tx, config.tx_af()), |
| 1305 | new_pin!(rts, AfType::output(OutputType::PushPull, Speed::Medium)), | 1301 | new_pin!(rts, config.rts_config.af_type()), |
| 1306 | new_pin!(cts, AfType::input(Pull::None)), | 1302 | new_pin!(cts, AfType::input(config.cts_pull)), |
| 1307 | None, | 1303 | None, |
| 1308 | None, | 1304 | None, |
| 1309 | None, | 1305 | None, |
| @@ -1326,7 +1322,7 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1326 | new_pin!(tx, config.tx_af()), | 1322 | new_pin!(tx, config.tx_af()), |
| 1327 | None, | 1323 | None, |
| 1328 | None, | 1324 | None, |
| 1329 | new_pin!(de, AfType::output(OutputType::PushPull, Speed::Medium)), | 1325 | new_pin!(de, config.de_config.af_type()), |
| 1330 | None, | 1326 | None, |
| 1331 | None, | 1327 | None, |
| 1332 | config, | 1328 | config, |
| @@ -1349,7 +1345,6 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1349 | tx: Peri<'d, impl TxPin<T>>, | 1345 | tx: Peri<'d, impl TxPin<T>>, |
| 1350 | mut config: Config, | 1346 | mut config: Config, |
| 1351 | readback: HalfDuplexReadback, | 1347 | readback: HalfDuplexReadback, |
| 1352 | half_duplex: HalfDuplexConfig, | ||
| 1353 | ) -> Result<Self, ConfigError> { | 1348 | ) -> Result<Self, ConfigError> { |
| 1354 | #[cfg(not(any(usart_v1, usart_v2)))] | 1349 | #[cfg(not(any(usart_v1, usart_v2)))] |
| 1355 | { | 1350 | { |
| @@ -1360,7 +1355,7 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1360 | Self::new_inner( | 1355 | Self::new_inner( |
| 1361 | peri, | 1356 | peri, |
| 1362 | None, | 1357 | None, |
| 1363 | new_pin!(tx, half_duplex.af_type()), | 1358 | new_pin!(tx, config.tx_af()), |
| 1364 | None, | 1359 | None, |
| 1365 | None, | 1360 | None, |
| 1366 | None, | 1361 | None, |
| @@ -1386,7 +1381,6 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1386 | rx: Peri<'d, impl RxPin<T>>, | 1381 | rx: Peri<'d, impl RxPin<T>>, |
| 1387 | mut config: Config, | 1382 | mut config: Config, |
| 1388 | readback: HalfDuplexReadback, | 1383 | readback: HalfDuplexReadback, |
| 1389 | half_duplex: HalfDuplexConfig, | ||
| 1390 | ) -> Result<Self, ConfigError> { | 1384 | ) -> Result<Self, ConfigError> { |
| 1391 | config.swap_rx_tx = true; | 1385 | config.swap_rx_tx = true; |
| 1392 | config.duplex = Duplex::Half(readback); | 1386 | config.duplex = Duplex::Half(readback); |
| @@ -1395,7 +1389,7 @@ impl<'d> Uart<'d, Blocking> { | |||
| 1395 | peri, | 1389 | peri, |
| 1396 | None, | 1390 | None, |
| 1397 | None, | 1391 | None, |
| 1398 | new_pin!(rx, half_duplex.af_type()), | 1392 | new_pin!(rx, config.rx_af()), |
| 1399 | None, | 1393 | None, |
| 1400 | None, | 1394 | None, |
| 1401 | None, | 1395 | None, |
diff --git a/examples/stm32g0/src/bin/onewire_ds18b20.rs b/examples/stm32g0/src/bin/onewire_ds18b20.rs index f85cc4ff8..62f8711a6 100644 --- a/examples/stm32g0/src/bin/onewire_ds18b20.rs +++ b/examples/stm32g0/src/bin/onewire_ds18b20.rs | |||
| @@ -8,7 +8,7 @@ use defmt::*; | |||
| 8 | use embassy_executor::Spawner; | 8 | use embassy_executor::Spawner; |
| 9 | use embassy_stm32::mode::Async; | 9 | use embassy_stm32::mode::Async; |
| 10 | use embassy_stm32::usart::{ | 10 | use embassy_stm32::usart::{ |
| 11 | BufferedUartRx, BufferedUartTx, Config, ConfigError, HalfDuplexConfig, RingBufferedUartRx, UartTx, | 11 | BufferedUartRx, BufferedUartTx, Config, ConfigError, OutputConfig, RingBufferedUartRx, UartTx, |
| 12 | }; | 12 | }; |
| 13 | use embassy_stm32::{bind_interrupts, peripherals, usart}; | 13 | use embassy_stm32::{bind_interrupts, peripherals, usart}; |
| 14 | use embassy_time::{Duration, Timer}; | 14 | use embassy_time::{Duration, Timer}; |
| @@ -21,16 +21,18 @@ fn create_onewire(p: embassy_stm32::Peripherals) -> OneWire<UartTx<'static, Asyn | |||
| 21 | USART1 => usart::InterruptHandler<peripherals::USART1>; | 21 | USART1 => usart::InterruptHandler<peripherals::USART1>; |
| 22 | }); | 22 | }); |
| 23 | 23 | ||
| 24 | let mut config = Config::default(); | ||
| 25 | config.tx_config = OutputConfig::OpenDrain; | ||
| 26 | |||
| 24 | let usart = Uart::new_half_duplex( | 27 | let usart = Uart::new_half_duplex( |
| 25 | p.USART1, | 28 | p.USART1, |
| 26 | p.PA9, | 29 | p.PA9, |
| 27 | Irqs, | 30 | Irqs, |
| 28 | p.DMA1_CH1, | 31 | p.DMA1_CH1, |
| 29 | p.DMA1_CH2, | 32 | p.DMA1_CH2, |
| 30 | Config::default(), | 33 | config, |
| 31 | // Enable readback so we can read sensor pulling data low while transmission is in progress | 34 | // Enable readback so we can read sensor pulling data low while transmission is in progress |
| 32 | usart::HalfDuplexReadback::Readback, | 35 | usart::HalfDuplexReadback::Readback, |
| 33 | HalfDuplexConfig::OpenDrainExternal, | ||
| 34 | ) | 36 | ) |
| 35 | .unwrap(); | 37 | .unwrap(); |
| 36 | 38 | ||
| @@ -50,6 +52,8 @@ fn create_onewire(p: embassy_stm32::Peripherals) -> OneWire<BufferedUartTx<'stat | |||
| 50 | }); | 52 | }); |
| 51 | 53 | ||
| 52 | const BUFFER_SIZE: usize = 16; | 54 | const BUFFER_SIZE: usize = 16; |
| 55 | let mut config = Confi::default(); | ||
| 56 | config.tx_config = OutputConfig::OpenDrain; | ||
| 53 | let tx_buf: &mut [u8; BUFFER_SIZE] = singleton!(TX_BUF: [u8; BUFFER_SIZE] = [0; BUFFER_SIZE]).unwrap(); | 57 | let tx_buf: &mut [u8; BUFFER_SIZE] = singleton!(TX_BUF: [u8; BUFFER_SIZE] = [0; BUFFER_SIZE]).unwrap(); |
| 54 | let rx_buf: &mut [u8; BUFFER_SIZE] = singleton!(RX_BUF: [u8; BUFFER_SIZE] = [0; BUFFER_SIZE]).unwrap(); | 58 | let rx_buf: &mut [u8; BUFFER_SIZE] = singleton!(RX_BUF: [u8; BUFFER_SIZE] = [0; BUFFER_SIZE]).unwrap(); |
| 55 | let usart = BufferedUart::new_half_duplex( | 59 | let usart = BufferedUart::new_half_duplex( |
| @@ -58,10 +62,9 @@ fn create_onewire(p: embassy_stm32::Peripherals) -> OneWire<BufferedUartTx<'stat | |||
| 58 | Irqs, | 62 | Irqs, |
| 59 | tx_buf, | 63 | tx_buf, |
| 60 | rx_buf, | 64 | rx_buf, |
| 61 | Config::default(), | 65 | config, |
| 62 | // Enable readback so we can read sensor pulling data low while transmission is in progress | 66 | // Enable readback so we can read sensor pulling data low while transmission is in progress |
| 63 | usart::HalfDuplexReadback::Readback, | 67 | usart::HalfDuplexReadback::Readback, |
| 64 | HalfDuplexConfig::OpenDrainExternal, | ||
| 65 | ) | 68 | ) |
| 66 | .unwrap(); | 69 | .unwrap(); |
| 67 | let (tx, rx) = usart.split(); | 70 | let (tx, rx) = usart.split(); |
