diff options
| -rw-r--r-- | embassy-stm32/src/adc/mod.rs | 2 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/u5_adc4.rs | 35 | ||||
| -rw-r--r-- | embassy-stm32/src/adc/v4.rs | 10 | ||||
| -rw-r--r-- | examples/stm32u5/src/bin/adc.rs | 30 |
4 files changed, 30 insertions, 47 deletions
diff --git a/embassy-stm32/src/adc/mod.rs b/embassy-stm32/src/adc/mod.rs index 3cf2ca72e..36898b8f9 100644 --- a/embassy-stm32/src/adc/mod.rs +++ b/embassy-stm32/src/adc/mod.rs | |||
| @@ -259,4 +259,4 @@ pub const fn resolution_to_max_count(res: Resolution) -> u32 { | |||
| 259 | #[allow(unreachable_patterns)] | 259 | #[allow(unreachable_patterns)] |
| 260 | _ => core::unreachable!(), | 260 | _ => core::unreachable!(), |
| 261 | } | 261 | } |
| 262 | } \ No newline at end of file | 262 | } |
diff --git a/embassy-stm32/src/adc/u5_adc4.rs b/embassy-stm32/src/adc/u5_adc4.rs index 468d16640..0635dad9b 100644 --- a/embassy-stm32/src/adc/u5_adc4.rs +++ b/embassy-stm32/src/adc/u5_adc4.rs | |||
| @@ -1,17 +1,12 @@ | |||
| 1 | pub use crate::pac::adc::vals::Adc4Res as Resolution; | ||
| 2 | pub use crate::pac::adc::vals::Adc4SampleTime as SampleTime; | ||
| 3 | pub use crate::pac::adc::vals::Adc4Presc as Presc; | ||
| 4 | pub use crate::pac::adc::regs::Adc4Chselrmod0; | ||
| 5 | |||
| 6 | #[allow(unused)] | 1 | #[allow(unused)] |
| 7 | use pac::adc::vals::{Adc4Exten, Adc4OversamplingRatio, Adc4Dmacfg}; | 2 | use pac::adc::vals::{Adc4Dmacfg, Adc4Exten, Adc4OversamplingRatio}; |
| 8 | 3 | ||
| 9 | use super::{ | 4 | use super::{blocking_delay_us, AdcChannel, AnyAdcChannel, RxDma4, SealedAdcChannel}; |
| 10 | blocking_delay_us, AdcChannel, SealedAdcChannel, AnyAdcChannel, RxDma4 | 5 | use crate::dma::Transfer; |
| 11 | }; | 6 | pub use crate::pac::adc::regs::Adc4Chselrmod0; |
| 7 | pub use crate::pac::adc::vals::{Adc4Presc as Presc, Adc4Res as Resolution, Adc4SampleTime as SampleTime}; | ||
| 12 | use crate::time::Hertz; | 8 | use crate::time::Hertz; |
| 13 | use crate::{pac, rcc, Peripheral}; | 9 | use crate::{pac, rcc, Peripheral}; |
| 14 | use crate::dma::Transfer; | ||
| 15 | 10 | ||
| 16 | const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); | 11 | const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); |
| 17 | 12 | ||
| @@ -74,7 +69,7 @@ impl<T: Instance> SealedAdcChannel<T> for Vcore { | |||
| 74 | 69 | ||
| 75 | pub enum DacChannel { | 70 | pub enum DacChannel { |
| 76 | OUT1, | 71 | OUT1, |
| 77 | OUT2 | 72 | OUT2, |
| 78 | } | 73 | } |
| 79 | 74 | ||
| 80 | /// Number of samples used for averaging. | 75 | /// Number of samples used for averaging. |
| @@ -186,7 +181,7 @@ pub struct Adc4<'d, T: Instance> { | |||
| 186 | #[derive(Debug)] | 181 | #[derive(Debug)] |
| 187 | pub enum Adc4Error { | 182 | pub enum Adc4Error { |
| 188 | InvalidSequence, | 183 | InvalidSequence, |
| 189 | DMAError | 184 | DMAError, |
| 190 | } | 185 | } |
| 191 | 186 | ||
| 192 | impl<'d, T: Instance> Adc4<'d, T> { | 187 | impl<'d, T: Instance> Adc4<'d, T> { |
| @@ -205,9 +200,7 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 205 | panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); | 200 | panic!("Maximal allowed frequency for ADC4 is {} MHz and it varies with different packages, refer to ST docs for more information.", MAX_ADC_CLK_FREQ.0 / 1_000_000 ); |
| 206 | } | 201 | } |
| 207 | 202 | ||
| 208 | let mut s = Self { | 203 | let mut s = Self { adc }; |
| 209 | adc, | ||
| 210 | }; | ||
| 211 | 204 | ||
| 212 | s.power_up(); | 205 | s.power_up(); |
| 213 | 206 | ||
| @@ -227,7 +220,7 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 227 | T::regs().cr().modify(|w| { | 220 | T::regs().cr().modify(|w| { |
| 228 | w.set_advregen(true); | 221 | w.set_advregen(true); |
| 229 | }); | 222 | }); |
| 230 | while !T::regs().isr().read().ldordy() { }; | 223 | while !T::regs().isr().read().ldordy() {} |
| 231 | 224 | ||
| 232 | T::regs().isr().modify(|w| { | 225 | T::regs().isr().modify(|w| { |
| 233 | w.set_ldordy(true); | 226 | w.set_ldordy(true); |
| @@ -300,8 +293,8 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 300 | pub fn enable_dac_channel(&self, dac: DacChannel) -> Dac { | 293 | pub fn enable_dac_channel(&self, dac: DacChannel) -> Dac { |
| 301 | let mux; | 294 | let mux; |
| 302 | match dac { | 295 | match dac { |
| 303 | DacChannel::OUT1 => {mux = false}, | 296 | DacChannel::OUT1 => mux = false, |
| 304 | DacChannel::OUT2 => {mux = true} | 297 | DacChannel::OUT2 => mux = true, |
| 305 | } | 298 | } |
| 306 | T::regs().or().modify(|w| w.set_chn21sel(mux)); | 299 | T::regs().or().modify(|w| w.set_chn21sel(mux)); |
| 307 | Dac {} | 300 | Dac {} |
| @@ -346,7 +339,7 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 346 | } | 339 | } |
| 347 | 340 | ||
| 348 | /// Read an ADC channel. | 341 | /// Read an ADC channel. |
| 349 | pub fn blocking_read(&mut self, channel: &mut impl AdcChannel<T>) -> u16{ | 342 | pub fn blocking_read(&mut self, channel: &mut impl AdcChannel<T>) -> u16 { |
| 350 | channel.setup(); | 343 | channel.setup(); |
| 351 | 344 | ||
| 352 | // Select channel | 345 | // Select channel |
| @@ -440,7 +433,7 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 440 | T::regs().chselrmod0().modify(|w| { | 433 | T::regs().chselrmod0().modify(|w| { |
| 441 | w.set_chsel(channel.channel as usize, true); | 434 | w.set_chsel(channel.channel as usize, true); |
| 442 | }); | 435 | }); |
| 443 | }; | 436 | } |
| 444 | 437 | ||
| 445 | let request = rx_dma.request(); | 438 | let request = rx_dma.request(); |
| 446 | let transfer = unsafe { | 439 | let transfer = unsafe { |
| @@ -483,4 +476,4 @@ impl<'d, T: Instance> Adc4<'d, T> { | |||
| 483 | while T::regs().cr().read().adstart() {} | 476 | while T::regs().cr().read().adstart() {} |
| 484 | } | 477 | } |
| 485 | } | 478 | } |
| 486 | } \ No newline at end of file | 479 | } |
diff --git a/embassy-stm32/src/adc/v4.rs b/embassy-stm32/src/adc/v4.rs index 96dae25bd..46f9c7ac7 100644 --- a/embassy-stm32/src/adc/v4.rs +++ b/embassy-stm32/src/adc/v4.rs | |||
| @@ -1,9 +1,7 @@ | |||
| 1 | #[allow(unused)] | ||
| 2 | use pac::adc::vals::{Adstp, Difsel, Exten, Pcsel, Dmngt}; | ||
| 3 | |||
| 4 | #[cfg(not(stm32u5))] | 1 | #[cfg(not(stm32u5))] |
| 5 | use pac::adc::vals::{Adcaldif, Boost}; | 2 | use pac::adc::vals::{Adcaldif, Boost}; |
| 6 | 3 | #[allow(unused)] | |
| 4 | use pac::adc::vals::{Adstp, Difsel, Dmngt, Exten, Pcsel}; | ||
| 7 | use pac::adccommon::vals::Presc; | 5 | use pac::adccommon::vals::Presc; |
| 8 | 6 | ||
| 9 | use super::{ | 7 | use super::{ |
| @@ -26,7 +24,6 @@ const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(50); | |||
| 26 | #[cfg(stm32u5)] | 24 | #[cfg(stm32u5)] |
| 27 | const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); | 25 | const MAX_ADC_CLK_FREQ: Hertz = Hertz::mhz(55); |
| 28 | 26 | ||
| 29 | |||
| 30 | #[cfg(stm32g4)] | 27 | #[cfg(stm32g4)] |
| 31 | const VREF_CHANNEL: u8 = 18; | 28 | const VREF_CHANNEL: u8 = 18; |
| 32 | #[cfg(stm32g4)] | 29 | #[cfg(stm32g4)] |
| @@ -41,7 +38,6 @@ const TEMP_CHANNEL: u8 = 18; | |||
| 41 | #[cfg(not(stm32u5))] | 38 | #[cfg(not(stm32u5))] |
| 42 | const VBAT_CHANNEL: u8 = 17; | 39 | const VBAT_CHANNEL: u8 = 17; |
| 43 | 40 | ||
| 44 | |||
| 45 | #[cfg(stm32u5)] | 41 | #[cfg(stm32u5)] |
| 46 | const VREF_CHANNEL: u8 = 0; | 42 | const VREF_CHANNEL: u8 = 0; |
| 47 | #[cfg(stm32u5)] | 43 | #[cfg(stm32u5)] |
diff --git a/examples/stm32u5/src/bin/adc.rs b/examples/stm32u5/src/bin/adc.rs index 05e3faeb1..6ba21cc63 100644 --- a/examples/stm32u5/src/bin/adc.rs +++ b/examples/stm32u5/src/bin/adc.rs | |||
| @@ -1,19 +1,14 @@ | |||
| 1 | #![no_std] | 1 | #![no_std] |
| 2 | #![no_main] | 2 | #![no_main] |
| 3 | 3 | ||
| 4 | 4 | use defmt::*; | |
| 5 | use defmt::{*}; | ||
| 6 | use defmt_rtt as _; | ||
| 7 | |||
| 8 | use embassy_stm32::adc; | 5 | use embassy_stm32::adc; |
| 9 | use embassy_stm32::adc::AdcChannel; | 6 | use embassy_stm32::adc::{adc4, AdcChannel}; |
| 10 | use embassy_stm32::adc::adc4; | 7 | use {defmt_rtt as _, panic_probe as _}; |
| 11 | use panic_probe as _; | ||
| 12 | |||
| 13 | 8 | ||
| 14 | #[embassy_executor::main] | 9 | #[embassy_executor::main] |
| 15 | async fn main(spawner: embassy_executor::Spawner) { | 10 | async fn main(_spawner: embassy_executor::Spawner) { |
| 16 | let mut config = embassy_stm32::Config::default(); | 11 | let config = embassy_stm32::Config::default(); |
| 17 | 12 | ||
| 18 | let mut p = embassy_stm32::init(config); | 13 | let mut p = embassy_stm32::init(config); |
| 19 | 14 | ||
| @@ -84,7 +79,8 @@ async fn main(spawner: embassy_executor::Spawner) { | |||
| 84 | ] | 79 | ] |
| 85 | .into_iter(), | 80 | .into_iter(), |
| 86 | &mut measurements, | 81 | &mut measurements, |
| 87 | ).await; | 82 | ) |
| 83 | .await; | ||
| 88 | let volt1: f32 = 3.3 * measurements[0] as f32 / max1 as f32; | 84 | let volt1: f32 = 3.3 * measurements[0] as f32 / max1 as f32; |
| 89 | let volt2: f32 = 3.3 * measurements[1] as f32 / max1 as f32; | 85 | let volt2: f32 = 3.3 * measurements[1] as f32 / max1 as f32; |
| 90 | 86 | ||
| @@ -101,15 +97,13 @@ async fn main(spawner: embassy_executor::Spawner) { | |||
| 101 | // The channels must be in ascending order and can't repeat for ADC4 | 97 | // The channels must be in ascending order and can't repeat for ADC4 |
| 102 | adc4.read( | 98 | adc4.read( |
| 103 | &mut p.GPDMA1_CH1, | 99 | &mut p.GPDMA1_CH1, |
| 104 | [ | 100 | [&mut degraded42, &mut degraded41].into_iter(), |
| 105 | &mut degraded42, | ||
| 106 | &mut degraded41, | ||
| 107 | ] | ||
| 108 | .into_iter(), | ||
| 109 | &mut measurements, | 101 | &mut measurements, |
| 110 | ).await.unwrap(); | 102 | ) |
| 103 | .await | ||
| 104 | .unwrap(); | ||
| 111 | let volt2: f32 = 3.3 * measurements[0] as f32 / max4 as f32; | 105 | let volt2: f32 = 3.3 * measurements[0] as f32 / max4 as f32; |
| 112 | let volt1: f32 = 3.3 * measurements[1] as f32 / max4 as f32; | 106 | let volt1: f32 = 3.3 * measurements[1] as f32 / max4 as f32; |
| 113 | info!("Async read 4 pin 1 {}", volt1); | 107 | info!("Async read 4 pin 1 {}", volt1); |
| 114 | info!("Async read 4 pin 2 {}", volt2); | 108 | info!("Async read 4 pin 2 {}", volt2); |
| 115 | } \ No newline at end of file | 109 | } |
