8 files changed, 51 insertions, 16 deletions

diff --git a/embassy-executor/CHANGELOG.md b/embassy-executor/CHANGELOG.md
index 999c77a83..69c82653b 100644
--- a/embassy-executor/CHANGELOG.md
+++ b/embassy-executor/CHANGELOG.md
@@ -10,6 +10,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 - Added new metadata API for tasks
 - Named main task when rtos-trace feature is enabled.
+- Upgraded rtos-trace
+- Fixed performance regression on some ESP32 MCUs.
 
 ## 0.9.0 - 2025-08-26
 
diff --git a/embassy-executor/Cargo.toml b/embassy-executor/Cargo.toml
index 79680ae74..dc423aba2 100644
--- a/embassy-executor/Cargo.toml
+++ b/embassy-executor/Cargo.toml
@@ -51,7 +51,7 @@ features = ["defmt", "arch-cortex-m", "executor-thread", "executor-interrupt"]
 [dependencies]
 defmt = { version = "1.0.1", optional = true }
 log = { version = "0.4.14", optional = true }
-rtos-trace = { version = "0.1.3", optional = true }
+rtos-trace = { version = "0.2", optional = true }
 
 embassy-executor-macros = { version = "0.7.0", path = "../embassy-executor-macros" }
 embassy-time-driver = { version = "0.2.1", path = "../embassy-time-driver", optional = true }
diff --git a/embassy-executor/src/raw/mod.rs b/embassy-executor/src/raw/mod.rs
index bdaa32951..4280c5750 100644
--- a/embassy-executor/src/raw/mod.rs
+++ b/embassy-executor/src/raw/mod.rs
@@ -12,8 +12,14 @@
 mod run_queue;
 
 #[cfg_attr(all(cortex_m, target_has_atomic = "32"), path = "state_atomics_arm.rs")]
-#[cfg_attr(all(not(cortex_m), target_has_atomic = "8"), path = "state_atomics.rs")]
-#[cfg_attr(not(target_has_atomic = "8"), path = "state_critical_section.rs")]
+#[cfg_attr(
+    all(not(cortex_m), any(target_has_atomic = "8", target_has_atomic = "32")),
+    path = "state_atomics.rs"
+)]
+#[cfg_attr(
+    not(any(target_has_atomic = "8", target_has_atomic = "32")),
+    path = "state_critical_section.rs"
+)]
 mod state;
 
 #[cfg(feature = "_any_trace")]
diff --git a/embassy-executor/src/raw/state_atomics.rs b/embassy-executor/src/raw/state_atomics.rs
index e813548ae..6675875be 100644
--- a/embassy-executor/src/raw/state_atomics.rs
+++ b/embassy-executor/src/raw/state_atomics.rs
@@ -1,4 +1,15 @@
-use core::sync::atomic::{AtomicU8, Ordering};
+// Prefer pointer-width atomic operations, as narrower ones may be slower.
+#[cfg(all(target_pointer_width = "32", target_has_atomic = "32"))]
+type AtomicState = core::sync::atomic::AtomicU32;
+#[cfg(not(all(target_pointer_width = "32", target_has_atomic = "32")))]
+type AtomicState = core::sync::atomic::AtomicU8;
+
+#[cfg(all(target_pointer_width = "32", target_has_atomic = "32"))]
+type StateBits = u32;
+#[cfg(not(all(target_pointer_width = "32", target_has_atomic = "32")))]
+type StateBits = u8;
+
+use core::sync::atomic::Ordering;
 
 #[derive(Clone, Copy)]
 pub(crate) struct Token(());
@@ -11,18 +22,18 @@ pub(crate) fn locked<R>(f: impl FnOnce(Token) -> R) -> R {
 }
 
 /// Task is spawned (has a future)
-pub(crate) const STATE_SPAWNED: u8 = 1 << 0;
+pub(crate) const STATE_SPAWNED: StateBits = 1 << 0;
 /// Task is in the executor run queue
-pub(crate) const STATE_RUN_QUEUED: u8 = 1 << 1;
+pub(crate) const STATE_RUN_QUEUED: StateBits = 1 << 1;
 
 pub(crate) struct State {
-    state: AtomicU8,
+    state: AtomicState,
 }
 
 impl State {
     pub const fn new() -> State {
         Self {
-            state: AtomicU8::new(0),
+            state: AtomicState::new(0),
         }
     }
 
diff --git a/embassy-executor/src/raw/state_critical_section.rs b/embassy-executor/src/raw/state_critical_section.rs
index ec08f2f58..b69a6ac66 100644
--- a/embassy-executor/src/raw/state_critical_section.rs
+++ b/embassy-executor/src/raw/state_critical_section.rs
@@ -3,13 +3,18 @@ use core::cell::Cell;
 pub(crate) use critical_section::{with as locked, CriticalSection as Token};
 use critical_section::{CriticalSection, Mutex};
 
+#[cfg(target_arch = "avr")]
+type StateBits = u8;
+#[cfg(not(target_arch = "avr"))]
+type StateBits = usize;
+
 /// Task is spawned (has a future)
-pub(crate) const STATE_SPAWNED: u8 = 1 << 0;
+pub(crate) const STATE_SPAWNED: StateBits = 1 << 0;
 /// Task is in the executor run queue
-pub(crate) const STATE_RUN_QUEUED: u8 = 1 << 1;
+pub(crate) const STATE_RUN_QUEUED: StateBits = 1 << 1;
 
 pub(crate) struct State {
-    state: Mutex<Cell<u8>>,
+    state: Mutex<Cell<StateBits>>,
 }
 
 impl State {
@@ -19,11 +24,11 @@ impl State {
         }
     }
 
-    fn update<R>(&self, f: impl FnOnce(&mut u8) -> R) -> R {
+    fn update<R>(&self, f: impl FnOnce(&mut StateBits) -> R) -> R {
         critical_section::with(|cs| self.update_with_cs(cs, f))
     }
 
-    fn update_with_cs<R>(&self, cs: CriticalSection<'_>, f: impl FnOnce(&mut u8) -> R) -> R {
+    fn update_with_cs<R>(&self, cs: CriticalSection<'_>, f: impl FnOnce(&mut StateBits) -> R) -> R {
         let s = self.state.borrow(cs);
         let mut val = s.get();
         let r = f(&mut val);
diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index c8ae7a357..dfb8ca066 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -8,6 +8,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 <!-- next-header -->
 ## Unreleased - ReleaseDate
 
+- fix: Fixed STM32H5 builds requiring time feature
+
 ## 0.4.0 - 2025-08-26
 
 - feat: stm32/sai: make NODIV independent of MCKDIV 
diff --git a/embassy-stm32/src/usb/usb.rs b/embassy-stm32/src/usb/usb.rs
index 92c1601cc..54596aeae 100644
--- a/embassy-stm32/src/usb/usb.rs
+++ b/embassy-stm32/src/usb/usb.rs
@@ -912,7 +912,16 @@ impl<'d, T: Instance> driver::EndpointOut for Endpoint<'d, T, Out> {
         // Software should ensure that a small delay is included before accessing the SRAM contents. This delay should be
         // 800 ns in Full Speed mode and 6.4 μs in Low Speed mode.
         #[cfg(stm32h5)]
-        embassy_time::block_for(embassy_time::Duration::from_nanos(800));
+        {
+            #[cfg(feature = "time")]
+            embassy_time::block_for(embassy_time::Duration::from_nanos(800));
+            #[cfg(not(feature = "time"))]
+            {
+                let freq = unsafe { crate::rcc::get_freqs() }.sys.to_hertz().unwrap().0 as u64;
+                let cycles = freq * 800 / 1_000_000;
+                cortex_m::asm::delay(cycles as u32);
+            }
+        }
 
         RX_COMPLETE[index].store(false, Ordering::Relaxed);
 
diff --git a/examples/nrf-rtos-trace/Cargo.toml b/examples/nrf-rtos-trace/Cargo.toml
index a2dc0c7ad..c9eeaaac7 100644
--- a/examples/nrf-rtos-trace/Cargo.toml
+++ b/examples/nrf-rtos-trace/Cargo.toml
@@ -25,8 +25,8 @@ cortex-m = { version = "0.7.6", features = ["inline-asm", "critical-section-sing
 cortex-m-rt = "0.7.0"
 panic-probe = "1.0.0"
 serde = { version = "1.0.136", default-features = false }
-rtos-trace = "0.1.3"
-systemview-target = { version = "0.1.2", features = ["callbacks-app", "callbacks-os", "log", "cortex-m"] }
+rtos-trace = "0.2"
+systemview-target = { version = "0.2", features = ["callbacks-app", "callbacks-os", "log", "cortex-m"] }
 log = { version = "0.4.17", optional = true }
 
 [[bin]]