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-rw-r--r--embassy-rp/Cargo.toml2
-rw-r--r--embassy-rp/src/clocks.rs92
-rw-r--r--embassy-rp/src/gpio.rs4
-rw-r--r--embassy-rp/src/pio.rs4
4 files changed, 51 insertions, 51 deletions
diff --git a/embassy-rp/Cargo.toml b/embassy-rp/Cargo.toml
index 49aa6a4d5..66823771a 100644
--- a/embassy-rp/Cargo.toml
+++ b/embassy-rp/Cargo.toml
@@ -76,7 +76,7 @@ embedded-storage = { version = "0.3" }
76rand_core = "0.6.4" 76rand_core = "0.6.4"
77fixed = "1.23.1" 77fixed = "1.23.1"
78 78
79rp-pac = { version = "5" } 79rp-pac = { version = "6" }
80 80
81embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] } 81embedded-hal-02 = { package = "embedded-hal", version = "0.2.6", features = ["unproven"] }
82embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true} 82embedded-hal-1 = { package = "embedded-hal", version = "=1.0.0-alpha.10", optional = true}
diff --git a/embassy-rp/src/clocks.rs b/embassy-rp/src/clocks.rs
index 4c6223107..ddd61d224 100644
--- a/embassy-rp/src/clocks.rs
+++ b/embassy-rp/src/clocks.rs
@@ -46,13 +46,13 @@ static CLOCKS: Clocks = Clocks {
46#[non_exhaustive] 46#[non_exhaustive]
47#[derive(Clone, Copy, Debug, PartialEq, Eq)] 47#[derive(Clone, Copy, Debug, PartialEq, Eq)]
48pub enum PeriClkSrc { 48pub enum PeriClkSrc {
49 Sys = ClkPeriCtrlAuxsrc::CLK_SYS.0, 49 Sys = ClkPeriCtrlAuxsrc::CLK_SYS as _,
50 PllSys = ClkPeriCtrlAuxsrc::CLKSRC_PLL_SYS.0, 50 PllSys = ClkPeriCtrlAuxsrc::CLKSRC_PLL_SYS as _,
51 PllUsb = ClkPeriCtrlAuxsrc::CLKSRC_PLL_USB.0, 51 PllUsb = ClkPeriCtrlAuxsrc::CLKSRC_PLL_USB as _,
52 Rosc = ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH.0, 52 Rosc = ClkPeriCtrlAuxsrc::ROSC_CLKSRC_PH as _,
53 Xosc = ClkPeriCtrlAuxsrc::XOSC_CLKSRC.0, 53 Xosc = ClkPeriCtrlAuxsrc::XOSC_CLKSRC as _,
54 // Gpin0 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN0.0, 54 // Gpin0 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
55 // Gpin1 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN1.0, 55 // Gpin1 = ClkPeriCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
56} 56}
57 57
58#[non_exhaustive] 58#[non_exhaustive]
@@ -251,12 +251,12 @@ pub struct SysClkConfig {
251#[non_exhaustive] 251#[non_exhaustive]
252#[derive(Clone, Copy, Debug, PartialEq, Eq)] 252#[derive(Clone, Copy, Debug, PartialEq, Eq)]
253pub enum UsbClkSrc { 253pub enum UsbClkSrc {
254 PllUsb = ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB.0, 254 PllUsb = ClkUsbCtrlAuxsrc::CLKSRC_PLL_USB as _,
255 PllSys = ClkUsbCtrlAuxsrc::CLKSRC_PLL_SYS.0, 255 PllSys = ClkUsbCtrlAuxsrc::CLKSRC_PLL_SYS as _,
256 Rosc = ClkUsbCtrlAuxsrc::ROSC_CLKSRC_PH.0, 256 Rosc = ClkUsbCtrlAuxsrc::ROSC_CLKSRC_PH as _,
257 Xosc = ClkUsbCtrlAuxsrc::XOSC_CLKSRC.0, 257 Xosc = ClkUsbCtrlAuxsrc::XOSC_CLKSRC as _,
258 // Gpin0 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN0.0, 258 // Gpin0 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
259 // Gpin1 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN1.0, 259 // Gpin1 = ClkUsbCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
260} 260}
261 261
262pub struct UsbClkConfig { 262pub struct UsbClkConfig {
@@ -269,12 +269,12 @@ pub struct UsbClkConfig {
269#[non_exhaustive] 269#[non_exhaustive]
270#[derive(Clone, Copy, Debug, PartialEq, Eq)] 270#[derive(Clone, Copy, Debug, PartialEq, Eq)]
271pub enum AdcClkSrc { 271pub enum AdcClkSrc {
272 PllUsb = ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB.0, 272 PllUsb = ClkAdcCtrlAuxsrc::CLKSRC_PLL_USB as _,
273 PllSys = ClkAdcCtrlAuxsrc::CLKSRC_PLL_SYS.0, 273 PllSys = ClkAdcCtrlAuxsrc::CLKSRC_PLL_SYS as _,
274 Rosc = ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH.0, 274 Rosc = ClkAdcCtrlAuxsrc::ROSC_CLKSRC_PH as _,
275 Xosc = ClkAdcCtrlAuxsrc::XOSC_CLKSRC.0, 275 Xosc = ClkAdcCtrlAuxsrc::XOSC_CLKSRC as _,
276 // Gpin0 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN0.0, 276 // Gpin0 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
277 // Gpin1 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN1.0, 277 // Gpin1 = ClkAdcCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
278} 278}
279 279
280pub struct AdcClkConfig { 280pub struct AdcClkConfig {
@@ -287,12 +287,12 @@ pub struct AdcClkConfig {
287#[non_exhaustive] 287#[non_exhaustive]
288#[derive(Clone, Copy, Debug, PartialEq, Eq)] 288#[derive(Clone, Copy, Debug, PartialEq, Eq)]
289pub enum RtcClkSrc { 289pub enum RtcClkSrc {
290 PllUsb = ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB.0, 290 PllUsb = ClkRtcCtrlAuxsrc::CLKSRC_PLL_USB as _,
291 PllSys = ClkRtcCtrlAuxsrc::CLKSRC_PLL_SYS.0, 291 PllSys = ClkRtcCtrlAuxsrc::CLKSRC_PLL_SYS as _,
292 Rosc = ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH.0, 292 Rosc = ClkRtcCtrlAuxsrc::ROSC_CLKSRC_PH as _,
293 Xosc = ClkRtcCtrlAuxsrc::XOSC_CLKSRC.0, 293 Xosc = ClkRtcCtrlAuxsrc::XOSC_CLKSRC as _,
294 // Gpin0 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN0.0, 294 // Gpin0 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
295 // Gpin1 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN1.0, 295 // Gpin1 = ClkRtcCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
296} 296}
297 297
298pub struct RtcClkConfig { 298pub struct RtcClkConfig {
@@ -396,7 +396,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
396 w.set_src(ref_src); 396 w.set_src(ref_src);
397 w.set_auxsrc(ref_aux); 397 w.set_auxsrc(ref_aux);
398 }); 398 });
399 while c.clk_ref_selected().read() != 1 << ref_src.0 {} 399 while c.clk_ref_selected().read() != 1 << ref_src as u32 {}
400 c.clk_ref_div().write(|w| { 400 c.clk_ref_div().write(|w| {
401 w.set_int(config.ref_clk.div); 401 w.set_int(config.ref_clk.div);
402 }); 402 });
@@ -425,13 +425,13 @@ pub(crate) unsafe fn init(config: ClockConfig) {
425 CLOCKS.sys.store(clk_sys_freq, Ordering::Relaxed); 425 CLOCKS.sys.store(clk_sys_freq, Ordering::Relaxed);
426 if sys_src != ClkSysCtrlSrc::CLK_REF { 426 if sys_src != ClkSysCtrlSrc::CLK_REF {
427 c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF)); 427 c.clk_sys_ctrl().write(|w| w.set_src(ClkSysCtrlSrc::CLK_REF));
428 while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF.0 {} 428 while c.clk_sys_selected().read() != 1 << ClkSysCtrlSrc::CLK_REF as u32 {}
429 } 429 }
430 c.clk_sys_ctrl().write(|w| { 430 c.clk_sys_ctrl().write(|w| {
431 w.set_auxsrc(sys_aux); 431 w.set_auxsrc(sys_aux);
432 w.set_src(sys_src); 432 w.set_src(sys_src);
433 }); 433 });
434 while c.clk_sys_selected().read() != 1 << sys_src.0 {} 434 while c.clk_sys_selected().read() != 1 << sys_src as u32 {}
435 c.clk_sys_div().write(|w| { 435 c.clk_sys_div().write(|w| {
436 w.set_int(config.sys_clk.div_int); 436 w.set_int(config.sys_clk.div_int);
437 w.set_frac(config.sys_clk.div_frac); 437 w.set_frac(config.sys_clk.div_frac);
@@ -442,7 +442,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
442 if let Some(src) = config.peri_clk_src { 442 if let Some(src) = config.peri_clk_src {
443 c.clk_peri_ctrl().write(|w| { 443 c.clk_peri_ctrl().write(|w| {
444 w.set_enable(true); 444 w.set_enable(true);
445 w.set_auxsrc(ClkPeriCtrlAuxsrc(src as _)); 445 w.set_auxsrc(ClkPeriCtrlAuxsrc::from_bits(src as _));
446 }); 446 });
447 let peri_freq = match src { 447 let peri_freq = match src {
448 PeriClkSrc::Sys => clk_sys_freq, 448 PeriClkSrc::Sys => clk_sys_freq,
@@ -468,7 +468,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
468 c.clk_usb_ctrl().write(|w| { 468 c.clk_usb_ctrl().write(|w| {
469 w.set_phase(conf.phase); 469 w.set_phase(conf.phase);
470 w.set_enable(true); 470 w.set_enable(true);
471 w.set_auxsrc(ClkUsbCtrlAuxsrc(conf.src as _)); 471 w.set_auxsrc(ClkUsbCtrlAuxsrc::from_bits(conf.src as _));
472 }); 472 });
473 let usb_freq = match conf.src { 473 let usb_freq = match conf.src {
474 UsbClkSrc::PllUsb => pll_usb_freq, 474 UsbClkSrc::PllUsb => pll_usb_freq,
@@ -491,7 +491,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
491 c.clk_adc_ctrl().write(|w| { 491 c.clk_adc_ctrl().write(|w| {
492 w.set_phase(conf.phase); 492 w.set_phase(conf.phase);
493 w.set_enable(true); 493 w.set_enable(true);
494 w.set_auxsrc(ClkAdcCtrlAuxsrc(conf.src as _)); 494 w.set_auxsrc(ClkAdcCtrlAuxsrc::from_bits(conf.src as _));
495 }); 495 });
496 let adc_in_freq = match conf.src { 496 let adc_in_freq = match conf.src {
497 AdcClkSrc::PllUsb => pll_usb_freq, 497 AdcClkSrc::PllUsb => pll_usb_freq,
@@ -517,7 +517,7 @@ pub(crate) unsafe fn init(config: ClockConfig) {
517 c.clk_rtc_ctrl().write(|w| { 517 c.clk_rtc_ctrl().write(|w| {
518 w.set_phase(conf.phase); 518 w.set_phase(conf.phase);
519 w.set_enable(true); 519 w.set_enable(true);
520 w.set_auxsrc(ClkRtcCtrlAuxsrc(conf.src as _)); 520 w.set_auxsrc(ClkRtcCtrlAuxsrc::from_bits(conf.src as _));
521 }); 521 });
522 let rtc_in_freq = match conf.src { 522 let rtc_in_freq = match conf.src {
523 RtcClkSrc::PllUsb => pll_usb_freq, 523 RtcClkSrc::PllUsb => pll_usb_freq,
@@ -718,7 +718,7 @@ impl<'d, T: Pin> Drop for Gpin<'d, T> {
718 self.gpin 718 self.gpin
719 .io() 719 .io()
720 .ctrl() 720 .ctrl()
721 .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0)); 721 .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _));
722 } 722 }
723} 723}
724 724
@@ -743,17 +743,17 @@ impl_gpoutpin!(PIN_25, 3);
743 743
744#[repr(u8)] 744#[repr(u8)]
745pub enum GpoutSrc { 745pub enum GpoutSrc {
746 PllSys = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS.0, 746 PllSys = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_SYS as _,
747 // Gpin0 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN0.0, 747 // Gpin0 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN0 as _ ,
748 // Gpin1 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN1.0, 748 // Gpin1 = ClkGpoutCtrlAuxsrc::CLKSRC_GPIN1 as _ ,
749 PllUsb = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_USB.0, 749 PllUsb = ClkGpoutCtrlAuxsrc::CLKSRC_PLL_USB as _,
750 Rosc = ClkGpoutCtrlAuxsrc::ROSC_CLKSRC.0, 750 Rosc = ClkGpoutCtrlAuxsrc::ROSC_CLKSRC as _,
751 Xosc = ClkGpoutCtrlAuxsrc::XOSC_CLKSRC.0, 751 Xosc = ClkGpoutCtrlAuxsrc::XOSC_CLKSRC as _,
752 Sys = ClkGpoutCtrlAuxsrc::CLK_SYS.0, 752 Sys = ClkGpoutCtrlAuxsrc::CLK_SYS as _,
753 Usb = ClkGpoutCtrlAuxsrc::CLK_USB.0, 753 Usb = ClkGpoutCtrlAuxsrc::CLK_USB as _,
754 Adc = ClkGpoutCtrlAuxsrc::CLK_ADC.0, 754 Adc = ClkGpoutCtrlAuxsrc::CLK_ADC as _,
755 Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC.0, 755 Rtc = ClkGpoutCtrlAuxsrc::CLK_RTC as _,
756 Ref = ClkGpoutCtrlAuxsrc::CLK_REF.0, 756 Ref = ClkGpoutCtrlAuxsrc::CLK_REF as _,
757} 757}
758 758
759pub struct Gpout<'d, T: GpoutPin> { 759pub struct Gpout<'d, T: GpoutPin> {
@@ -780,7 +780,7 @@ impl<'d, T: GpoutPin> Gpout<'d, T> {
780 pub fn set_src(&self, src: GpoutSrc) { 780 pub fn set_src(&self, src: GpoutSrc) {
781 let c = pac::CLOCKS; 781 let c = pac::CLOCKS;
782 c.clk_gpout_ctrl(self.gpout.number()).modify(|w| { 782 c.clk_gpout_ctrl(self.gpout.number()).modify(|w| {
783 w.set_auxsrc(ClkGpoutCtrlAuxsrc(src as _)); 783 w.set_auxsrc(ClkGpoutCtrlAuxsrc::from_bits(src as _));
784 }); 784 });
785 } 785 }
786 786
@@ -831,7 +831,7 @@ impl<'d, T: GpoutPin> Drop for Gpout<'d, T> {
831 self.gpout 831 self.gpout
832 .io() 832 .io()
833 .ctrl() 833 .ctrl()
834 .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0)); 834 .write(|w| w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _));
835 } 835 }
836} 836}
837 837
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index ce0d02557..f8048a4dd 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -452,7 +452,7 @@ impl<'d, T: Pin> Flex<'d, T> {
452 }); 452 });
453 453
454 pin.io().ctrl().write(|w| { 454 pin.io().ctrl().write(|w| {
455 w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0.0); 455 w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::SIO_0 as _);
456 }); 456 });
457 457
458 Self { pin } 458 Self { pin }
@@ -618,7 +618,7 @@ impl<'d, T: Pin> Drop for Flex<'d, T> {
618 fn drop(&mut self) { 618 fn drop(&mut self) {
619 self.pin.pad_ctrl().write(|_| {}); 619 self.pin.pad_ctrl().write(|_| {});
620 self.pin.io().ctrl().write(|w| { 620 self.pin.io().ctrl().write(|w| {
621 w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL.0); 621 w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _);
622 }); 622 });
623 } 623 }
624} 624}
diff --git a/embassy-rp/src/pio.rs b/embassy-rp/src/pio.rs
index 1b36e0a54..30648e8ea 100644
--- a/embassy-rp/src/pio.rs
+++ b/embassy-rp/src/pio.rs
@@ -834,7 +834,7 @@ impl<'d, PIO: Instance> Common<'d, PIO> {
834 /// of [`Pio`] do not keep pin registrations alive.** 834 /// of [`Pio`] do not keep pin registrations alive.**
835 pub fn make_pio_pin(&mut self, pin: impl Peripheral<P = impl PioPin + 'd> + 'd) -> Pin<'d, PIO> { 835 pub fn make_pio_pin(&mut self, pin: impl Peripheral<P = impl PioPin + 'd> + 'd) -> Pin<'d, PIO> {
836 into_ref!(pin); 836 into_ref!(pin);
837 pin.io().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL.0)); 837 pin.io().ctrl().write(|w| w.set_funcsel(PIO::FUNCSEL as _));
838 // we can be relaxed about this because we're &mut here and nothing is cached 838 // we can be relaxed about this because we're &mut here and nothing is cached
839 PIO::state().used_pins.fetch_or(1 << pin.pin_bank(), Ordering::Relaxed); 839 PIO::state().used_pins.fetch_or(1 << pin.pin_bank(), Ordering::Relaxed);
840 Pin { 840 Pin {
@@ -998,7 +998,7 @@ fn on_pio_drop<PIO: Instance>() {
998 let state = PIO::state(); 998 let state = PIO::state();
999 if state.users.fetch_sub(1, Ordering::AcqRel) == 1 { 999 if state.users.fetch_sub(1, Ordering::AcqRel) == 1 {
1000 let used_pins = state.used_pins.load(Ordering::Relaxed); 1000 let used_pins = state.used_pins.load(Ordering::Relaxed);
1001 let null = Gpio0ctrlFuncsel::NULL.0; 1001 let null = Gpio0ctrlFuncsel::NULL as _;
1002 // we only have 30 pins. don't test the other two since gpio() asserts. 1002 // we only have 30 pins. don't test the other two since gpio() asserts.
1003 for i in 0..30 { 1003 for i in 0..30 {
1004 if used_pins & (1 << i) != 0 { 1004 if used_pins & (1 << i) != 0 {