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-rw-r--r--embassy-stm32/src/rcc/f4f7.rs8
-rw-r--r--embassy-stm32/src/usb_otg/usb.rs28
-rw-r--r--embassy-usb/src/lib.rs10
3 files changed, 36 insertions, 10 deletions
diff --git a/embassy-stm32/src/rcc/f4f7.rs b/embassy-stm32/src/rcc/f4f7.rs
index 2e4f95722..d507a6fd4 100644
--- a/embassy-stm32/src/rcc/f4f7.rs
+++ b/embassy-stm32/src/rcc/f4f7.rs
@@ -113,6 +113,14 @@ pub(crate) unsafe fn init(config: Config) {
113 while !PWR.csr1().read().odswrdy() {} 113 while !PWR.csr1().read().odswrdy() {}
114 } 114 }
115 115
116 #[cfg(any(stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423))]
117 {
118 use crate::pac::pwr::vals::Vos;
119 use crate::pac::PWR;
120
121 PWR.cr1().modify(|w| w.set_vos(Vos::SCALE1));
122 }
123
116 // Configure HSI 124 // Configure HSI
117 let hsi = match config.hsi { 125 let hsi = match config.hsi {
118 false => { 126 false => {
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs
index e45e4ac43..d90f83433 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@@ -40,6 +40,7 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
40 // Handle RX 40 // Handle RX
41 while r.gintsts().read().rxflvl() { 41 while r.gintsts().read().rxflvl() {
42 let status = r.grxstsp().read(); 42 let status = r.grxstsp().read();
43 trace!("=== status {:08x}", status.0);
43 let ep_num = status.epnum() as usize; 44 let ep_num = status.epnum() as usize;
44 let len = status.bcnt() as usize; 45 let len = status.bcnt() as usize;
45 46
@@ -51,6 +52,15 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
51 assert!(len == 8, "invalid SETUP packet length={}", len); 52 assert!(len == 8, "invalid SETUP packet length={}", len);
52 assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num); 53 assert!(ep_num == 0, "invalid SETUP packet endpoint={}", ep_num);
53 54
55 // flushing TX if something stuck in control endpoint
56 if r.dieptsiz(ep_num).read().pktcnt() != 0 {
57 r.grstctl().modify(|w| {
58 w.set_txfnum(ep_num as _);
59 w.set_txfflsh(true);
60 });
61 while r.grstctl().read().txfflsh() {}
62 }
63
54 if state.ep0_setup_ready.load(Ordering::Relaxed) == false { 64 if state.ep0_setup_ready.load(Ordering::Relaxed) == false {
55 // SAFETY: exclusive access ensured by atomic bool 65 // SAFETY: exclusive access ensured by atomic bool
56 let data = unsafe { &mut *state.ep0_setup_data.get() }; 66 let data = unsafe { &mut *state.ep0_setup_data.get() };
@@ -96,6 +106,11 @@ impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for InterruptHandl
96 } 106 }
97 vals::Pktstsd::SETUP_DATA_DONE => { 107 vals::Pktstsd::SETUP_DATA_DONE => {
98 trace!("SETUP_DATA_DONE ep={}", ep_num); 108 trace!("SETUP_DATA_DONE ep={}", ep_num);
109
110 // Clear NAK to indicate we are ready to receive more data
111 T::regs().doepctl(ep_num).modify(|w| {
112 w.set_cnak(true);
113 });
99 } 114 }
100 x => trace!("unknown PKTSTS: {}", x.to_bits()), 115 x => trace!("unknown PKTSTS: {}", x.to_bits()),
101 } 116 }
@@ -911,11 +926,9 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> {
911 trace!("enumdne"); 926 trace!("enumdne");
912 927
913 let speed = r.dsts().read().enumspd(); 928 let speed = r.dsts().read().enumspd();
914 trace!(" speed={}", speed.to_bits()); 929 let trdt = calculate_trdt(speed, T::frequency());
915 930 trace!(" speed={} trdt={}", speed.to_bits(), trdt);
916 r.gusbcfg().modify(|w| { 931 r.gusbcfg().modify(|w| w.set_trdt(trdt));
917 w.set_trdt(calculate_trdt(speed, T::frequency()));
918 });
919 932
920 r.gintsts().write(|w| w.set_enumdne(true)); // clear 933 r.gintsts().write(|w| w.set_enumdne(true)); // clear
921 Self::restore_irqs(); 934 Self::restore_irqs();
@@ -1314,11 +1327,6 @@ impl<'d, T: Instance> embassy_usb_driver::ControlPipe for ControlPipe<'d, T> {
1314 w.set_rxdpid_stupcnt(1); 1327 w.set_rxdpid_stupcnt(1);
1315 }); 1328 });
1316 1329
1317 // Clear NAK to indicate we are ready to receive more data
1318 T::regs().doepctl(self.ep_out.info.addr.index()).modify(|w| {
1319 w.set_cnak(true);
1320 });
1321
1322 trace!("SETUP received: {:?}", data); 1330 trace!("SETUP received: {:?}", data);
1323 Poll::Ready(data) 1331 Poll::Ready(data)
1324 } else { 1332 } else {
diff --git a/embassy-usb/src/lib.rs b/embassy-usb/src/lib.rs
index 88d88cad7..9fc1e3320 100644
--- a/embassy-usb/src/lib.rs
+++ b/embassy-usb/src/lib.rs
@@ -406,6 +406,16 @@ impl<'d, D: Driver<'d>> UsbDevice<'d, D> {
406 let max_packet_size = self.control.max_packet_size(); 406 let max_packet_size = self.control.max_packet_size();
407 let mut total = 0; 407 let mut total = 0;
408 408
409 if req_length > self.control_buf.len() {
410 warn!(
411 "got CONTROL OUT with length {} higher than the control_buf len {}, rejecting.",
412 req_length,
413 self.control_buf.len()
414 );
415 self.control.reject().await;
416 return;
417 }
418
409 let chunks = self.control_buf[..req_length].chunks_mut(max_packet_size); 419 let chunks = self.control_buf[..req_length].chunks_mut(max_packet_size);
410 for (first, last, chunk) in first_last(chunks) { 420 for (first, last, chunk) in first_last(chunks) {
411 let size = match self.control.data_out(chunk, first, last).await { 421 let size = match self.control.data_out(chunk, first, last).await {