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-rw-r--r--embassy-stm32/src/ucpd.rs40
1 files changed, 16 insertions, 24 deletions
diff --git a/embassy-stm32/src/ucpd.rs b/embassy-stm32/src/ucpd.rs
index ff8c7aaad..d6d0682b9 100644
--- a/embassy-stm32/src/ucpd.rs
+++ b/embassy-stm32/src/ucpd.rs
@@ -20,10 +20,10 @@ use core::sync::atomic::{AtomicBool, Ordering};
20use core::task::Poll; 20use core::task::Poll;
21 21
22use embassy_hal_internal::drop::OnDrop; 22use embassy_hal_internal::drop::OnDrop;
23use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; 23use embassy_hal_internal::{into_ref, Peripheral};
24use embassy_sync::waitqueue::AtomicWaker; 24use embassy_sync::waitqueue::AtomicWaker;
25 25
26use crate::dma::{AnyChannel, Request, Transfer, TransferOptions}; 26use crate::dma::{ChannelAndRequest, TransferOptions};
27use crate::interrupt; 27use crate::interrupt;
28use crate::interrupt::typelevel::Interrupt; 28use crate::interrupt::typelevel::Interrupt;
29use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode}; 29use crate::pac::ucpd::vals::{Anamode, Ccenable, PscUsbpdclk, Txmode};
@@ -179,10 +179,14 @@ impl<'d, T: Instance> Ucpd<'d, T> {
179 self.cc_phy, 179 self.cc_phy,
180 PdPhy { 180 PdPhy {
181 _lifetime: PhantomData, 181 _lifetime: PhantomData,
182 rx_dma_ch: rx_dma.map_into(), 182 rx_dma: ChannelAndRequest {
183 rx_dma_req, 183 channel: rx_dma.map_into(),
184 tx_dma_ch: tx_dma.map_into(), 184 request: rx_dma_req,
185 tx_dma_req, 185 },
186 tx_dma: ChannelAndRequest {
187 channel: tx_dma.map_into(),
188 request: tx_dma_req,
189 },
186 }, 190 },
187 ) 191 )
188 } 192 }
@@ -309,10 +313,8 @@ pub enum TxError {
309/// Power Delivery (PD) PHY. 313/// Power Delivery (PD) PHY.
310pub struct PdPhy<'d, T: Instance> { 314pub struct PdPhy<'d, T: Instance> {
311 _lifetime: PhantomData<&'d mut T>, 315 _lifetime: PhantomData<&'d mut T>,
312 rx_dma_ch: PeripheralRef<'d, AnyChannel>, 316 rx_dma: ChannelAndRequest<'d>,
313 rx_dma_req: Request, 317 tx_dma: ChannelAndRequest<'d>,
314 tx_dma_ch: PeripheralRef<'d, AnyChannel>,
315 tx_dma_req: Request,
316} 318}
317 319
318impl<'d, T: Instance> Drop for PdPhy<'d, T> { 320impl<'d, T: Instance> Drop for PdPhy<'d, T> {
@@ -337,13 +339,8 @@ impl<'d, T: Instance> PdPhy<'d, T> {
337 let r = T::REGS; 339 let r = T::REGS;
338 340
339 let dma = unsafe { 341 let dma = unsafe {
340 Transfer::new_read( 342 self.rx_dma
341 &mut self.rx_dma_ch, 343 .read(r.rxdr().as_ptr() as *mut u8, buf, TransferOptions::default())
342 self.rx_dma_req,
343 r.rxdr().as_ptr() as *mut u8,
344 buf,
345 TransferOptions::default(),
346 )
347 }; 344 };
348 345
349 // Clear interrupt flags (possibly set from last receive). 346 // Clear interrupt flags (possibly set from last receive).
@@ -418,13 +415,8 @@ impl<'d, T: Instance> PdPhy<'d, T> {
418 415
419 // Start the DMA and let it do its thing in the background. 416 // Start the DMA and let it do its thing in the background.
420 let _dma = unsafe { 417 let _dma = unsafe {
421 Transfer::new_write( 418 self.tx_dma
422 &mut self.tx_dma_ch, 419 .write(buf, r.txdr().as_ptr() as *mut u8, TransferOptions::default())
423 self.tx_dma_req,
424 buf,
425 r.txdr().as_ptr() as *mut u8,
426 TransferOptions::default(),
427 )
428 }; 420 };
429 421
430 // Configure and start the transmission. 422 // Configure and start the transmission.