diff options
| -rw-r--r-- | embassy-stm32/src/lib.rs | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/embassy-stm32/src/lib.rs b/embassy-stm32/src/lib.rs index 6a3d1c463..05b1ff045 100644 --- a/embassy-stm32/src/lib.rs +++ b/embassy-stm32/src/lib.rs | |||
| @@ -172,6 +172,14 @@ pub struct Config { | |||
| 172 | #[cfg(dbgmcu)] | 172 | #[cfg(dbgmcu)] |
| 173 | pub enable_debug_during_sleep: bool, | 173 | pub enable_debug_during_sleep: bool, |
| 174 | 174 | ||
| 175 | /// On low-power boards (eg. `stm32l4`, `stm32l5` and `stm32u5`), | ||
| 176 | /// some GPIO pins are powered by an auxiliary, independent power supply (`VDDIO2`), | ||
| 177 | /// which needs to be enabled before these pins can be used. | ||
| 178 | /// | ||
| 179 | /// May increase power consumption. Defaults to true. | ||
| 180 | #[cfg(any(stm32l4, stm32l5, stm32u5))] | ||
| 181 | pub enable_independent_io_supply: bool, | ||
| 182 | |||
| 175 | /// BDMA interrupt priority. | 183 | /// BDMA interrupt priority. |
| 176 | /// | 184 | /// |
| 177 | /// Defaults to P0 (highest). | 185 | /// Defaults to P0 (highest). |
| @@ -209,6 +217,8 @@ impl Default for Config { | |||
| 209 | rcc: Default::default(), | 217 | rcc: Default::default(), |
| 210 | #[cfg(dbgmcu)] | 218 | #[cfg(dbgmcu)] |
| 211 | enable_debug_during_sleep: true, | 219 | enable_debug_during_sleep: true, |
| 220 | #[cfg(any(stm32l4, stm32l5, stm32u5))] | ||
| 221 | enable_independent_io_supply: true, | ||
| 212 | #[cfg(bdma)] | 222 | #[cfg(bdma)] |
| 213 | bdma_interrupt_priority: Priority::P0, | 223 | bdma_interrupt_priority: Priority::P0, |
| 214 | #[cfg(dma)] | 224 | #[cfg(dma)] |
| @@ -270,6 +280,23 @@ pub fn init(config: Config) -> Peripherals { | |||
| 270 | #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] | 280 | #[cfg(not(any(stm32f2, stm32f4, stm32f7, stm32l0, stm32h5, stm32h7)))] |
| 271 | peripherals::FLASH::enable_and_reset_with_cs(cs); | 281 | peripherals::FLASH::enable_and_reset_with_cs(cs); |
| 272 | 282 | ||
| 283 | // Enable the VDDIO2 power supply on chips that have it. | ||
| 284 | // Note that this requires the PWR peripheral to be enabled first. | ||
| 285 | #[cfg(any(stm32l4, stm32l5))] | ||
| 286 | { | ||
| 287 | crate::pac::PWR.cr2().modify(|w| { | ||
| 288 | // The official documentation states that we should ideally enable VDDIO2 | ||
| 289 | // through the PVME2 bit, but it looks like this bit | ||
| 290 | w.set_iosv(config.enable_independent_io_supply); | ||
| 291 | }); | ||
| 292 | } | ||
| 293 | #[cfg(stm32u5)] | ||
| 294 | { | ||
| 295 | crate::pac::PWR.svmcr().modify(|w| { | ||
| 296 | w.set_io2sv(config.enable_independent_io_supply); | ||
| 297 | }); | ||
| 298 | } | ||
| 299 | |||
| 273 | // dead battery functionality is still present on these | 300 | // dead battery functionality is still present on these |
| 274 | // chips despite them not having UCPD- disable it | 301 | // chips despite them not having UCPD- disable it |
| 275 | #[cfg(any(stm32g070, stm32g0b0))] | 302 | #[cfg(any(stm32g070, stm32g0b0))] |
