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-rw-r--r--embassy-rp/src/uart/mod.rs51
1 files changed, 23 insertions, 28 deletions
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs
index 7540052b8..f9cce5c69 100644
--- a/embassy-rp/src/uart/mod.rs
+++ b/embassy-rp/src/uart/mod.rs
@@ -324,25 +324,6 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {
324 } 324 }
325 } 325 }
326 326
327 fn baudrate_calculations(baudrate: u32) -> (u32, u32) {
328
329 let clk_base = crate::clocks::clk_peri_freq();
330
331 let baud_rate_div = (8 * clk_base) / baudrate;
332 let mut baud_ibrd = baud_rate_div >> 7;
333 let mut baud_fbrd = ((baud_rate_div & 0x7f) + 1) / 2;
334
335 if baud_ibrd == 0 {
336 baud_ibrd = 1;
337 baud_fbrd = 0;
338 } else if baud_ibrd >= 65535 {
339 baud_ibrd = 65535;
340 baud_fbrd = 0;
341 }
342
343 (baud_ibrd, baud_fbrd)
344 }
345
346 fn init( 327 fn init(
347 tx: Option<PeripheralRef<'_, AnyPin>>, 328 tx: Option<PeripheralRef<'_, AnyPin>>,
348 rx: Option<PeripheralRef<'_, AnyPin>>, 329 rx: Option<PeripheralRef<'_, AnyPin>>,
@@ -369,11 +350,7 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {
369 pin.pad_ctrl().write(|w| w.set_ie(true)); 350 pin.pad_ctrl().write(|w| w.set_ie(true));
370 } 351 }
371 352
372 let (baud_ibrd, baud_fbrd) = Uart::<T,M>::baudrate_calculations(config.baudrate); 353 Uart::<T,M>::set_baudrate_inner(config.baudrate);
373
374 // Load PL011's baud divisor registers
375 r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
376 r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
377 354
378 let (pen, eps) = match config.parity { 355 let (pen, eps) = match config.parity {
379 Parity::ParityNone => (false, false), 356 Parity::ParityNone => (false, false),
@@ -408,20 +385,38 @@ impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {
408 } 385 }
409 } 386 }
410 387
388
389 /// sets baudrate on runtime
411 pub fn set_baudrate(&mut self, baudrate: u32) { 390 pub fn set_baudrate(&mut self, baudrate: u32) {
412 391 Self::set_baudrate_inner(baudrate);
392 }
393
394
395 fn set_baudrate_inner(baudrate: u32) {
413 let r = T::regs(); 396 let r = T::regs();
414 397
415 let (baud_ibrd, baud_fbrd) = Self::baudrate_calculations(baudrate); 398 let clk_base = crate::clocks::clk_peri_freq();
416 399
400 let baud_rate_div = (8 * clk_base) / baudrate;
401 let mut baud_ibrd = baud_rate_div >> 7;
402 let mut baud_fbrd = ((baud_rate_div & 0x7f) + 1) / 2;
403
404 if baud_ibrd == 0 {
405 baud_ibrd = 1;
406 baud_fbrd = 0;
407 } else if baud_ibrd >= 65535 {
408 baud_ibrd = 65535;
409 baud_fbrd = 0;
410 }
411
417 unsafe { 412 unsafe {
418 413
419 // Load PL011's baud divisor registers 414 // Load PL011's baud divisor registers
420 r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd)); 415 r.uartibrd().write_value(pac::uart::regs::Uartibrd(baud_ibrd));
421 r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd)); 416 r.uartfbrd().write_value(pac::uart::regs::Uartfbrd(baud_fbrd));
422 } 417 }
423
424 } 418 }
419
425} 420}
426 421
427impl<'d, T: Instance, M: Mode> Uart<'d, T, M> { 422impl<'d, T: Instance, M: Mode> Uart<'d, T, M> {