diff options
| -rw-r--r-- | embassy-stm32/src/dma/dma_bdma.rs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/embassy-stm32/src/dma/dma_bdma.rs b/embassy-stm32/src/dma/dma_bdma.rs index 6144db0d6..d31f4d01a 100644 --- a/embassy-stm32/src/dma/dma_bdma.rs +++ b/embassy-stm32/src/dma/dma_bdma.rs | |||
| @@ -359,11 +359,13 @@ impl AnyChannel { | |||
| 359 | match self.info().dma { | 359 | match self.info().dma { |
| 360 | #[cfg(dma)] | 360 | #[cfg(dma)] |
| 361 | DmaInfo::Dma(r) => { | 361 | DmaInfo::Dma(r) => { |
| 362 | let state: &ChannelState = &STATE[self.id as usize]; | ||
| 362 | let ch = r.st(info.num); | 363 | let ch = r.st(info.num); |
| 363 | 364 | ||
| 364 | // "Preceding reads and writes cannot be moved past subsequent writes." | 365 | // "Preceding reads and writes cannot be moved past subsequent writes." |
| 365 | fence(Ordering::SeqCst); | 366 | fence(Ordering::SeqCst); |
| 366 | 367 | ||
| 368 | state.complete_count.store(0, Ordering::Release); | ||
| 367 | self.clear_irqs(); | 369 | self.clear_irqs(); |
| 368 | 370 | ||
| 369 | ch.par().write_value(peri_addr as u32); | 371 | ch.par().write_value(peri_addr as u32); |
