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-rw-r--r--embassy-stm32/src/rcc/u5.rs16
-rw-r--r--examples/stm32u5/src/bin/usb_serial.rs2
2 files changed, 18 insertions, 0 deletions
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index 81bdec881..dff08dc9b 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -45,6 +45,16 @@ pub struct PllConfig {
45 /// The multiplied clock – `source` divided by `m` times `n` – must be between 128 and 544 45 /// The multiplied clock – `source` divided by `m` times `n` – must be between 128 and 544
46 /// MHz. The upper limit may be lower depending on the `Config { voltage_range }`. 46 /// MHz. The upper limit may be lower depending on the `Config { voltage_range }`.
47 pub n: Plln, 47 pub n: Plln,
48 /// The divider for the P output.
49 ///
50 /// The P output is one of several options
51 /// that can be used to feed the SAI/MDF/ADF Clock mux's.
52 pub p: Plldiv,
53 /// The divider for the Q output.
54 ///
55 /// The Q ouput is one of severals options that can be used to feed the 48MHz clocks
56 /// and the OCTOSPI clock. It may also be used on the MDF/ADF clock mux's.
57 pub q: Plldiv,
48 /// The divider for the R output. 58 /// The divider for the R output.
49 /// 59 ///
50 /// When used to drive the system clock, `source` divided by `m` times `n` divided by `r` 60 /// When used to drive the system clock, `source` divided by `m` times `n` divided by `r`
@@ -60,6 +70,8 @@ impl PllConfig {
60 source: PllSource::HSI, 70 source: PllSource::HSI,
61 m: Pllm::DIV1, 71 m: Pllm::DIV1,
62 n: Plln::MUL10, 72 n: Plln::MUL10,
73 p: Plldiv::DIV3,
74 q: Plldiv::DIV2,
63 r: Plldiv::DIV1, 75 r: Plldiv::DIV1,
64 } 76 }
65 } 77 }
@@ -70,6 +82,8 @@ impl PllConfig {
70 source: PllSource::MSIS(Msirange::RANGE_48MHZ), 82 source: PllSource::MSIS(Msirange::RANGE_48MHZ),
71 m: Pllm::DIV3, 83 m: Pllm::DIV3,
72 n: Plln::MUL10, 84 n: Plln::MUL10,
85 p: Plldiv::DIV3,
86 q: Plldiv::DIV2,
73 r: Plldiv::DIV1, 87 r: Plldiv::DIV1,
74 } 88 }
75 } 89 }
@@ -301,6 +315,8 @@ pub(crate) unsafe fn init(config: Config) {
301 RCC.pll1divr().modify(|w| { 315 RCC.pll1divr().modify(|w| {
302 // Set the VCO multiplier 316 // Set the VCO multiplier
303 w.set_plln(pll.n); 317 w.set_plln(pll.n);
318 w.set_pllp(pll.p);
319 w.set_pllq(pll.q);
304 // Set the R output divisor 320 // Set the R output divisor
305 w.set_pllr(pll.r); 321 w.set_pllr(pll.r);
306 }); 322 });
diff --git a/examples/stm32u5/src/bin/usb_serial.rs b/examples/stm32u5/src/bin/usb_serial.rs
index 44d1df4f1..dca34fd0e 100644
--- a/examples/stm32u5/src/bin/usb_serial.rs
+++ b/examples/stm32u5/src/bin/usb_serial.rs
@@ -26,6 +26,8 @@ async fn main(_spawner: Spawner) {
26 source: PllSource::HSI, 26 source: PllSource::HSI,
27 m: Pllm::DIV2, 27 m: Pllm::DIV2,
28 n: Plln::MUL10, 28 n: Plln::MUL10,
29 p: Plldiv::DIV1,
30 q: Plldiv::DIV1,
29 r: Plldiv::DIV1, 31 r: Plldiv::DIV1,
30 }); 32 });
31 config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB 33 config.rcc.hsi48 = Some(Hsi48Config { sync_from_usb: true }); // needed for USB