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-rw-r--r--embassy-mcxa/src/lib.rs1
-rw-r--r--embassy-mcxa/src/reset_reason.rs106
-rw-r--r--examples/mcxa/src/bin/reset-reason.rs15
3 files changed, 122 insertions, 0 deletions
diff --git a/embassy-mcxa/src/lib.rs b/embassy-mcxa/src/lib.rs
index be279e509..7de5839be 100644
--- a/embassy-mcxa/src/lib.rs
+++ b/embassy-mcxa/src/lib.rs
@@ -17,6 +17,7 @@ pub mod i2c;
17pub mod interrupt; 17pub mod interrupt;
18pub mod lpuart; 18pub mod lpuart;
19pub mod ostimer; 19pub mod ostimer;
20pub mod reset_reason;
20pub mod rtc; 21pub mod rtc;
21 22
22pub use crate::pac::NVIC_PRIO_BITS; 23pub use crate::pac::NVIC_PRIO_BITS;
diff --git a/embassy-mcxa/src/reset_reason.rs b/embassy-mcxa/src/reset_reason.rs
new file mode 100644
index 000000000..f9a9ce096
--- /dev/null
+++ b/embassy-mcxa/src/reset_reason.rs
@@ -0,0 +1,106 @@
1//! Reset reason
2//!
3//! MCXA families keep the most recent reset reason in the SRS
4//! register of the CMC block. This lets users understand why the MCU
5//! has reset and take appropriate corrective actions if required.
6
7/// Reads the most recent reset reason from the Core Mode Controller
8/// (CMC).
9pub fn reset_reason() -> ResetReason {
10 let regs = unsafe { &*crate::pac::Cmc::steal() };
11
12 let srs = regs.srs().read();
13
14 if srs.wakeup().is_enabled() {
15 ResetReason::WakeUp
16 } else if srs.por().bit_is_set() {
17 ResetReason::Por
18 } else if srs.vd().bit_is_set() {
19 ResetReason::VoltageDetect
20 } else if srs.warm().bit_is_set() {
21 ResetReason::Warm
22 } else if srs.fatal().bit_is_set() {
23 ResetReason::Fatal
24 } else if srs.pin().bit_is_set() {
25 ResetReason::Pin
26 } else if srs.dap().bit_is_set() {
27 ResetReason::Dap
28 } else if srs.rstack().bit_is_set() {
29 ResetReason::ResetAckTimeout
30 } else if srs.lpack().bit_is_set() {
31 ResetReason::LowPowerAckTimeout
32 } else if srs.scg().bit_is_set() {
33 ResetReason::SystemClockGeneration
34 } else if srs.wwdt0().bit_is_set() {
35 ResetReason::Wwdt0
36 } else if srs.sw().bit_is_set() {
37 ResetReason::Software
38 } else if srs.lockup().bit_is_set() {
39 ResetReason::Lockup
40 } else if srs.cdog0().bit_is_set() {
41 ResetReason::Cdog0
42 } else if srs.cdog1().bit_is_set() {
43 ResetReason::Cdog1
44 } else if srs.jtag().bit_is_set() {
45 ResetReason::Jtag
46 } else {
47 ResetReason::Tamper
48 }
49}
50
51/// Indicates the type and source of the most recent reset.
52#[derive(Clone, Copy, Debug)]
53#[cfg_attr(feature = "defmt", derive(defmt::Format))]
54#[non_exhaustive]
55pub enum ResetReason {
56 /// Tamper reset.
57 Tamper,
58
59 /// JTAG System Reset request.
60 Jtag,
61
62 /// Code Watchdog 0 reset.
63 Cdog0,
64
65 /// Code Watchdog 1 reset.
66 Cdog1,
67
68 /// Lockup reset.
69 Lockup,
70
71 /// Software reset.
72 Software,
73
74 /// Windowed Watchdog 0 reset.
75 Wwdt0,
76
77 /// System clock generation reset.
78 SystemClockGeneration,
79
80 /// Low Power Acknowledge Timeout reset.
81 LowPowerAckTimeout,
82
83 /// Reset Timeout.
84 ResetAckTimeout,
85
86 /// Debug Access Port reset.
87 Dap,
88
89 /// External assertion of RESET_b pin.
90 Pin,
91
92 /// Fatal reset.
93 Fatal,
94
95 /// Warm reset.
96 Warm,
97
98 /// Voltage detect reset.
99 VoltageDetect,
100
101 /// Power-on reset.
102 Por,
103
104 /// Wake-up reset.
105 WakeUp,
106}
diff --git a/examples/mcxa/src/bin/reset-reason.rs b/examples/mcxa/src/bin/reset-reason.rs
new file mode 100644
index 000000000..c244fbe04
--- /dev/null
+++ b/examples/mcxa/src/bin/reset-reason.rs
@@ -0,0 +1,15 @@
1#![no_std]
2#![no_main]
3
4use embassy_executor::Spawner;
5use hal::config::Config;
6use hal::reset_reason::reset_reason;
7use {defmt_rtt as _, embassy_mcxa as hal, panic_probe as _};
8
9#[embassy_executor::main]
10async fn main(_spawner: Spawner) {
11 let config = Config::default();
12 let _p = hal::init(config);
13
14 defmt::info!("Reset Reason: '{}'", reset_reason());
15}