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-rw-r--r--tests/link_ram_cortex_m.x4
1 files changed, 4 insertions, 0 deletions
diff --git a/tests/link_ram_cortex_m.x b/tests/link_ram_cortex_m.x
index 5cb23a642..39a31b52a 100644
--- a/tests/link_ram_cortex_m.x
+++ b/tests/link_ram_cortex_m.x
@@ -133,14 +133,18 @@ SECTIONS
133 { 133 {
134 . = ALIGN(4); 134 . = ALIGN(4);
135 __sdata = .; 135 __sdata = .;
136 __edata = .; /* RAM: By setting __sdata=__edata cortex-m-rt has to copy 0 bytes as .data is already in RAM */
137
136 *(.data .data.*); 138 *(.data .data.*);
137 . = ALIGN(4); /* 4-byte align the end (VMA) of this section */ 139 . = ALIGN(4); /* 4-byte align the end (VMA) of this section */
138 } > RAM 140 } > RAM
139 /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to 141 /* Allow sections from user `memory.x` injected using `INSERT AFTER .data` to
140 * use the .data loading mechanism by pushing __edata. Note: do not change 142 * use the .data loading mechanism by pushing __edata. Note: do not change
141 * output region or load region in those user sections! */ 143 * output region or load region in those user sections! */
144 /* Link from RAM: Disabled, now __sdata == __edata
142 . = ALIGN(4); 145 . = ALIGN(4);
143 __edata = .; 146 __edata = .;
147 */
144 148
145 /* LMA of .data */ 149 /* LMA of .data */
146 __sidata = LOADADDR(.data); 150 __sidata = LOADADDR(.data);