diff options
| -rw-r--r-- | embassy-stm32/src/rcc/bd.rs | 58 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/f2.rs | 12 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/f4.rs | 11 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/l0.rs | 12 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/l4.rs | 6 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/mod.rs | 10 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/wb.rs | 11 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/wl.rs | 6 |
8 files changed, 84 insertions, 42 deletions
diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs index d774b993b..762e84355 100644 --- a/embassy-stm32/src/rcc/bd.rs +++ b/embassy-stm32/src/rcc/bd.rs | |||
| @@ -1,5 +1,5 @@ | |||
| 1 | #[allow(dead_code)] | 1 | #[allow(dead_code)] |
| 2 | #[derive(Default)] | 2 | #[derive(Default, Clone, Copy)] |
| 3 | pub enum LseDrive { | 3 | pub enum LseDrive { |
| 4 | #[cfg(any(rtc_v2f7, rtc_v2l4))] | 4 | #[cfg(any(rtc_v2f7, rtc_v2l4))] |
| 5 | Low = 0, | 5 | Low = 0, |
| @@ -87,40 +87,42 @@ impl BackupDomain { | |||
| 87 | rtc_v3u5 | 87 | rtc_v3u5 |
| 88 | ))] | 88 | ))] |
| 89 | #[allow(dead_code, unused_variables)] | 89 | #[allow(dead_code, unused_variables)] |
| 90 | pub fn configure_ls(clock_source: RtcClockSource, lse_drive: Option<LseDrive>) { | 90 | pub fn configure_ls(clock_source: RtcClockSource, lsi: bool, lse: Option<LseDrive>) { |
| 91 | match clock_source { | 91 | if lsi { |
| 92 | RtcClockSource::LSI => { | 92 | #[cfg(rtc_v3u5)] |
| 93 | #[cfg(rtc_v3u5)] | 93 | let csr = crate::pac::RCC.bdcr(); |
| 94 | let csr = crate::pac::RCC.bdcr(); | ||
| 95 | |||
| 96 | #[cfg(not(rtc_v3u5))] | ||
| 97 | let csr = crate::pac::RCC.csr(); | ||
| 98 | 94 | ||
| 99 | Self::modify(|_| { | 95 | #[cfg(not(rtc_v3u5))] |
| 100 | #[cfg(not(any(rcc_wb, rcc_wba)))] | 96 | let csr = crate::pac::RCC.csr(); |
| 101 | csr.modify(|w| w.set_lsion(true)); | ||
| 102 | |||
| 103 | #[cfg(any(rcc_wb, rcc_wba))] | ||
| 104 | csr.modify(|w| w.set_lsi1on(true)); | ||
| 105 | }); | ||
| 106 | 97 | ||
| 98 | Self::modify(|_| { | ||
| 107 | #[cfg(not(any(rcc_wb, rcc_wba)))] | 99 | #[cfg(not(any(rcc_wb, rcc_wba)))] |
| 108 | while !csr.read().lsirdy() {} | 100 | csr.modify(|w| w.set_lsion(true)); |
| 109 | 101 | ||
| 110 | #[cfg(any(rcc_wb, rcc_wba))] | 102 | #[cfg(any(rcc_wb, rcc_wba))] |
| 111 | while !csr.read().lsi1rdy() {} | 103 | csr.modify(|w| w.set_lsi1on(true)); |
| 112 | } | 104 | }); |
| 113 | RtcClockSource::LSE => { | ||
| 114 | let lse_drive = lse_drive.unwrap_or_default(); | ||
| 115 | 105 | ||
| 116 | Self::modify(|w| { | 106 | #[cfg(not(any(rcc_wb, rcc_wba)))] |
| 117 | #[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))] | 107 | while !csr.read().lsirdy() {} |
| 118 | w.set_lsedrv(lse_drive.into()); | ||
| 119 | w.set_lseon(true); | ||
| 120 | }); | ||
| 121 | 108 | ||
| 122 | while !Self::read().lserdy() {} | 109 | #[cfg(any(rcc_wb, rcc_wba))] |
| 123 | } | 110 | while !csr.read().lsi1rdy() {} |
| 111 | } | ||
| 112 | |||
| 113 | if let Some(lse_drive) = lse { | ||
| 114 | Self::modify(|w| { | ||
| 115 | #[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))] | ||
| 116 | w.set_lsedrv(lse_drive.into()); | ||
| 117 | w.set_lseon(true); | ||
| 118 | }); | ||
| 119 | |||
| 120 | while !Self::read().lserdy() {} | ||
| 121 | } | ||
| 122 | |||
| 123 | match clock_source { | ||
| 124 | RtcClockSource::LSI => assert!(lsi), | ||
| 125 | RtcClockSource::LSE => assert!(&lse.is_some()), | ||
| 124 | _ => {} | 126 | _ => {} |
| 125 | }; | 127 | }; |
| 126 | 128 | ||
diff --git a/embassy-stm32/src/rcc/f2.rs b/embassy-stm32/src/rcc/f2.rs index da88e44dc..56ccdcbd8 100644 --- a/embassy-stm32/src/rcc/f2.rs +++ b/embassy-stm32/src/rcc/f2.rs | |||
| @@ -291,6 +291,8 @@ pub struct Config { | |||
| 291 | pub pll: PLLConfig, | 291 | pub pll: PLLConfig, |
| 292 | pub mux: ClockSrc, | 292 | pub mux: ClockSrc, |
| 293 | pub rtc: Option<RtcClockSource>, | 293 | pub rtc: Option<RtcClockSource>, |
| 294 | pub lsi: bool, | ||
| 295 | pub lse: Option<Hertz>, | ||
| 294 | pub voltage: VoltageScale, | 296 | pub voltage: VoltageScale, |
| 295 | pub ahb_pre: AHBPrescaler, | 297 | pub ahb_pre: AHBPrescaler, |
| 296 | pub apb1_pre: APBPrescaler, | 298 | pub apb1_pre: APBPrescaler, |
| @@ -308,6 +310,8 @@ impl Default for Config { | |||
| 308 | voltage: VoltageScale::Scale3, | 310 | voltage: VoltageScale::Scale3, |
| 309 | mux: ClockSrc::HSI, | 311 | mux: ClockSrc::HSI, |
| 310 | rtc: None, | 312 | rtc: None, |
| 313 | lsi: false, | ||
| 314 | lse: None, | ||
| 311 | ahb_pre: AHBPrescaler::DIV1, | 315 | ahb_pre: AHBPrescaler::DIV1, |
| 312 | apb1_pre: APBPrescaler::DIV1, | 316 | apb1_pre: APBPrescaler::DIV1, |
| 313 | apb2_pre: APBPrescaler::DIV1, | 317 | apb2_pre: APBPrescaler::DIV1, |
| @@ -421,9 +425,11 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 421 | RCC.apb1enr().modify(|w| w.set_pwren(true)); | 425 | RCC.apb1enr().modify(|w| w.set_pwren(true)); |
| 422 | PWR.cr().read(); | 426 | PWR.cr().read(); |
| 423 | 427 | ||
| 424 | config | 428 | BackupDomain::configure_ls( |
| 425 | .rtc | 429 | config.rtc.unwrap_or(RtcClockSource::NOCLOCK), |
| 426 | .map(|clock_source| BackupDomain::configure_ls(clock_source, None)); | 430 | config.lsi, |
| 431 | config.lse.map(|_| Default::default()), | ||
| 432 | ); | ||
| 427 | 433 | ||
| 428 | set_freqs(Clocks { | 434 | set_freqs(Clocks { |
| 429 | sys: sys_clk, | 435 | sys: sys_clk, |
diff --git a/embassy-stm32/src/rcc/f4.rs b/embassy-stm32/src/rcc/f4.rs index f7bc0d99a..d8d0312bc 100644 --- a/embassy-stm32/src/rcc/f4.rs +++ b/embassy-stm32/src/rcc/f4.rs | |||
| @@ -35,6 +35,8 @@ pub struct Config { | |||
| 35 | 35 | ||
| 36 | pub pll48: bool, | 36 | pub pll48: bool, |
| 37 | pub rtc: Option<RtcClockSource>, | 37 | pub rtc: Option<RtcClockSource>, |
| 38 | pub lsi: bool, | ||
| 39 | pub lse: Option<Hertz>, | ||
| 38 | } | 40 | } |
| 39 | 41 | ||
| 40 | #[cfg(stm32f410)] | 42 | #[cfg(stm32f410)] |
| @@ -461,12 +463,15 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 461 | }) | 463 | }) |
| 462 | }); | 464 | }); |
| 463 | 465 | ||
| 464 | config | 466 | BackupDomain::configure_ls( |
| 465 | .rtc | 467 | config.rtc.unwrap_or(RtcClockSource::NOCLOCK), |
| 466 | .map(|clock_source| BackupDomain::configure_ls(clock_source, None)); | 468 | config.lsi, |
| 469 | config.lse.map(|_| Default::default()), | ||
| 470 | ); | ||
| 467 | 471 | ||
| 468 | let rtc = match config.rtc { | 472 | let rtc = match config.rtc { |
| 469 | Some(RtcClockSource::LSI) => Some(LSI_FREQ), | 473 | Some(RtcClockSource::LSI) => Some(LSI_FREQ), |
| 474 | Some(RtcClockSource::LSE) => Some(config.lse.unwrap()), | ||
| 470 | _ => None, | 475 | _ => None, |
| 471 | }; | 476 | }; |
| 472 | 477 | ||
diff --git a/embassy-stm32/src/rcc/l0.rs b/embassy-stm32/src/rcc/l0.rs index 2dfd0232c..1c655592e 100644 --- a/embassy-stm32/src/rcc/l0.rs +++ b/embassy-stm32/src/rcc/l0.rs | |||
| @@ -138,6 +138,8 @@ pub struct Config { | |||
| 138 | #[cfg(crs)] | 138 | #[cfg(crs)] |
| 139 | pub enable_hsi48: bool, | 139 | pub enable_hsi48: bool, |
| 140 | pub rtc: Option<RtcClockSource>, | 140 | pub rtc: Option<RtcClockSource>, |
| 141 | pub lse: Option<Hertz>, | ||
| 142 | pub lsi: bool, | ||
| 141 | } | 143 | } |
| 142 | 144 | ||
| 143 | impl Default for Config { | 145 | impl Default for Config { |
| @@ -151,6 +153,8 @@ impl Default for Config { | |||
| 151 | #[cfg(crs)] | 153 | #[cfg(crs)] |
| 152 | enable_hsi48: false, | 154 | enable_hsi48: false, |
| 153 | rtc: None, | 155 | rtc: None, |
| 156 | lse: None, | ||
| 157 | lsi: false, | ||
| 154 | } | 158 | } |
| 155 | } | 159 | } |
| 156 | } | 160 | } |
| @@ -235,9 +239,11 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 235 | } | 239 | } |
| 236 | }; | 240 | }; |
| 237 | 241 | ||
| 238 | config.rtc.map(|rtc| { | 242 | BackupDomain::configure_ls( |
| 239 | BackupDomain::configure_ls(rtc, None); | 243 | config.rtc.unwrap_or(RtcClockSource::NOCLOCK), |
| 240 | }); | 244 | config.lsi, |
| 245 | config.lse.map(|_| Default::default()), | ||
| 246 | ); | ||
| 241 | 247 | ||
| 242 | RCC.cfgr().modify(|w| { | 248 | RCC.cfgr().modify(|w| { |
| 243 | w.set_sw(sw); | 249 | w.set_sw(sw); |
diff --git a/embassy-stm32/src/rcc/l4.rs b/embassy-stm32/src/rcc/l4.rs index 447a57b2c..f7b9354a6 100644 --- a/embassy-stm32/src/rcc/l4.rs +++ b/embassy-stm32/src/rcc/l4.rs | |||
| @@ -241,6 +241,8 @@ pub struct Config { | |||
| 241 | #[cfg(not(any(stm32l471, stm32l475, stm32l476, stm32l486)))] | 241 | #[cfg(not(any(stm32l471, stm32l475, stm32l476, stm32l486)))] |
| 242 | pub hsi48: bool, | 242 | pub hsi48: bool, |
| 243 | pub rtc_mux: RtcClockSource, | 243 | pub rtc_mux: RtcClockSource, |
| 244 | pub lse: Option<Hertz>, | ||
| 245 | pub lsi: bool, | ||
| 244 | } | 246 | } |
| 245 | 247 | ||
| 246 | impl Default for Config { | 248 | impl Default for Config { |
| @@ -255,6 +257,8 @@ impl Default for Config { | |||
| 255 | #[cfg(not(any(stm32l471, stm32l475, stm32l476, stm32l486)))] | 257 | #[cfg(not(any(stm32l471, stm32l475, stm32l476, stm32l486)))] |
| 256 | hsi48: false, | 258 | hsi48: false, |
| 257 | rtc_mux: RtcClockSource::LSI, | 259 | rtc_mux: RtcClockSource::LSI, |
| 260 | lsi: true, | ||
| 261 | lse: None, | ||
| 258 | } | 262 | } |
| 259 | } | 263 | } |
| 260 | } | 264 | } |
| @@ -407,7 +411,7 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 407 | 411 | ||
| 408 | RCC.apb1enr1().modify(|w| w.set_pwren(true)); | 412 | RCC.apb1enr1().modify(|w| w.set_pwren(true)); |
| 409 | 413 | ||
| 410 | BackupDomain::configure_ls(config.rtc_mux, None); | 414 | BackupDomain::configure_ls(config.rtc_mux, config.lsi, config.lse.map(|_| Default::default())); |
| 411 | 415 | ||
| 412 | let (sys_clk, sw) = match config.mux { | 416 | let (sys_clk, sw) = match config.mux { |
| 413 | ClockSrc::MSI(range) => { | 417 | ClockSrc::MSI(range) => { |
diff --git a/embassy-stm32/src/rcc/mod.rs b/embassy-stm32/src/rcc/mod.rs index 892dcf937..ff9b9bac8 100644 --- a/embassy-stm32/src/rcc/mod.rs +++ b/embassy-stm32/src/rcc/mod.rs | |||
| @@ -31,6 +31,16 @@ pub use _version::*; | |||
| 31 | #[cfg(feature = "low-power")] | 31 | #[cfg(feature = "low-power")] |
| 32 | use atomic_polyfill::{AtomicU32, Ordering}; | 32 | use atomic_polyfill::{AtomicU32, Ordering}; |
| 33 | 33 | ||
| 34 | // Model Clock Configuration | ||
| 35 | // | ||
| 36 | // pub struct Clocks { | ||
| 37 | // hse: Option<Hertz>, | ||
| 38 | // hsi: bool, | ||
| 39 | // lse: Option<Hertz>, | ||
| 40 | // lsi: bool, | ||
| 41 | // rtc: RtcSource, | ||
| 42 | // } | ||
| 43 | |||
| 34 | #[derive(Clone, Copy, Debug)] | 44 | #[derive(Clone, Copy, Debug)] |
| 35 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] | 45 | #[cfg_attr(feature = "defmt", derive(defmt::Format))] |
| 36 | pub struct Clocks { | 46 | pub struct Clocks { |
diff --git a/embassy-stm32/src/rcc/wb.rs b/embassy-stm32/src/rcc/wb.rs index 3f4c37429..ee45a342b 100644 --- a/embassy-stm32/src/rcc/wb.rs +++ b/embassy-stm32/src/rcc/wb.rs | |||
| @@ -108,6 +108,7 @@ pub struct Pll { | |||
| 108 | pub struct Config { | 108 | pub struct Config { |
| 109 | pub hse: Option<Hse>, | 109 | pub hse: Option<Hse>, |
| 110 | pub lse: Option<Hertz>, | 110 | pub lse: Option<Hertz>, |
| 111 | pub lsi: bool, | ||
| 111 | pub sys: Sysclk, | 112 | pub sys: Sysclk, |
| 112 | pub mux: Option<PllMux>, | 113 | pub mux: Option<PllMux>, |
| 113 | pub pll48: Option<Pll48Source>, | 114 | pub pll48: Option<Pll48Source>, |
| @@ -136,6 +137,7 @@ pub const WPAN_DEFAULT: Config = Config { | |||
| 136 | }), | 137 | }), |
| 137 | pll48: None, | 138 | pll48: None, |
| 138 | rtc: Some(RtcClockSource::LSE), | 139 | rtc: Some(RtcClockSource::LSE), |
| 140 | lsi: false, | ||
| 139 | 141 | ||
| 140 | pll: Some(Pll { | 142 | pll: Some(Pll { |
| 141 | mul: 12, | 143 | mul: 12, |
| @@ -164,6 +166,7 @@ impl Default for Config { | |||
| 164 | pll: None, | 166 | pll: None, |
| 165 | pllsai: None, | 167 | pllsai: None, |
| 166 | rtc: None, | 168 | rtc: None, |
| 169 | lsi: false, | ||
| 167 | 170 | ||
| 168 | ahb1_pre: AHBPrescaler::DIV1, | 171 | ahb1_pre: AHBPrescaler::DIV1, |
| 169 | ahb2_pre: AHBPrescaler::DIV1, | 172 | ahb2_pre: AHBPrescaler::DIV1, |
| @@ -294,9 +297,11 @@ pub(crate) fn configure_clocks(config: &Config) { | |||
| 294 | 297 | ||
| 295 | rcc.cfgr().modify(|w| w.set_stopwuck(true)); | 298 | rcc.cfgr().modify(|w| w.set_stopwuck(true)); |
| 296 | 299 | ||
| 297 | config | 300 | BackupDomain::configure_ls( |
| 298 | .rtc | 301 | config.rtc.unwrap_or(RtcClockSource::NOCLOCK), |
| 299 | .map(|clock_source| BackupDomain::configure_ls(clock_source, None)); | 302 | config.lsi, |
| 303 | config.lse.map(|_| Default::default()), | ||
| 304 | ); | ||
| 300 | 305 | ||
| 301 | match &config.hse { | 306 | match &config.hse { |
| 302 | Some(hse) => { | 307 | Some(hse) => { |
diff --git a/embassy-stm32/src/rcc/wl.rs b/embassy-stm32/src/rcc/wl.rs index 07856a28c..5db942fca 100644 --- a/embassy-stm32/src/rcc/wl.rs +++ b/embassy-stm32/src/rcc/wl.rs | |||
| @@ -138,6 +138,8 @@ pub struct Config { | |||
| 138 | pub apb1_pre: APBPrescaler, | 138 | pub apb1_pre: APBPrescaler, |
| 139 | pub apb2_pre: APBPrescaler, | 139 | pub apb2_pre: APBPrescaler, |
| 140 | pub rtc_mux: RtcClockSource, | 140 | pub rtc_mux: RtcClockSource, |
| 141 | pub lse: Option<Hertz>, | ||
| 142 | pub lsi: bool, | ||
| 141 | pub adc_clock_source: AdcClockSource, | 143 | pub adc_clock_source: AdcClockSource, |
| 142 | } | 144 | } |
| 143 | 145 | ||
| @@ -151,6 +153,8 @@ impl Default for Config { | |||
| 151 | apb1_pre: APBPrescaler::DIV1, | 153 | apb1_pre: APBPrescaler::DIV1, |
| 152 | apb2_pre: APBPrescaler::DIV1, | 154 | apb2_pre: APBPrescaler::DIV1, |
| 153 | rtc_mux: RtcClockSource::LSI, | 155 | rtc_mux: RtcClockSource::LSI, |
| 156 | lsi: true, | ||
| 157 | lse: None, | ||
| 154 | adc_clock_source: AdcClockSource::default(), | 158 | adc_clock_source: AdcClockSource::default(), |
| 155 | } | 159 | } |
| 156 | } | 160 | } |
| @@ -231,7 +235,7 @@ pub(crate) unsafe fn init(config: Config) { | |||
| 231 | while FLASH.acr().read().latency() != ws {} | 235 | while FLASH.acr().read().latency() != ws {} |
| 232 | 236 | ||
| 233 | // Enables the LSI if configured | 237 | // Enables the LSI if configured |
| 234 | BackupDomain::configure_ls(config.rtc_mux, None); | 238 | BackupDomain::configure_ls(config.rtc_mux, config.lsi, config.lse.map(|_| Default::default())); |
| 235 | 239 | ||
| 236 | match config.mux { | 240 | match config.mux { |
| 237 | ClockSrc::HSI16 => { | 241 | ClockSrc::HSI16 => { |
