diff options
| -rw-r--r-- | embassy-stm32/src/adc/v3.rs | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/embassy-stm32/src/adc/v3.rs b/embassy-stm32/src/adc/v3.rs index f561f817c..c032113d5 100644 --- a/embassy-stm32/src/adc/v3.rs +++ b/embassy-stm32/src/adc/v3.rs | |||
| @@ -247,9 +247,14 @@ impl<'d, T: Instance> Adc<'d, T> { | |||
| 247 | Averaging::Samples128 => (true, 6, 7), | 247 | Averaging::Samples128 => (true, 6, 7), |
| 248 | Averaging::Samples256 => (true, 7, 8), | 248 | Averaging::Samples256 => (true, 7, 8), |
| 249 | }; | 249 | }; |
| 250 | |||
| 251 | T::regs().cfgr2().modify(|reg| { | 250 | T::regs().cfgr2().modify(|reg| { |
| 251 | #[cfg(not(adc_g0))] | ||
| 252 | reg.set_rovse(enable); | 252 | reg.set_rovse(enable); |
| 253 | #[cfg(adc_g0)] | ||
| 254 | reg.set_ovse(enable); | ||
| 255 | #[cfg(any(adc_h5, adc_h7rs))] | ||
| 256 | reg.set_ovsr(samples.into()); | ||
| 257 | #[cfg(not(any(adc_h5, adc_h7rs)))] | ||
| 253 | reg.set_ovsr(samples); | 258 | reg.set_ovsr(samples); |
| 254 | reg.set_ovss(right_shift); | 259 | reg.set_ovss(right_shift); |
| 255 | }) | 260 | }) |
