diff options
| -rw-r--r-- | embassy-stm32/Cargo.toml | 4 | ||||
| -rw-r--r-- | embassy-stm32/build.rs | 80 | ||||
| -rw-r--r-- | embassy-stm32/src/rcc/wba.rs | 2 |
3 files changed, 29 insertions, 57 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index c384f14f1..389ed0041 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml | |||
| @@ -68,7 +68,7 @@ rand_core = "0.6.3" | |||
| 68 | sdio-host = "0.5.0" | 68 | sdio-host = "0.5.0" |
| 69 | critical-section = "1.1" | 69 | critical-section = "1.1" |
| 70 | #stm32-metapac = { version = "15" } | 70 | #stm32-metapac = { version = "15" } |
| 71 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-3cc1a1603e61881a6f0a1a47c12c16c57c245ba8" } | 71 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6097928f720646c73d6483a3245f922bd5faee2f" } |
| 72 | vcell = "0.1.3" | 72 | vcell = "0.1.3" |
| 73 | bxcan = "0.7.0" | 73 | bxcan = "0.7.0" |
| 74 | nb = "1.0.0" | 74 | nb = "1.0.0" |
| @@ -89,7 +89,7 @@ critical-section = { version = "1.1", features = ["std"] } | |||
| 89 | proc-macro2 = "1.0.36" | 89 | proc-macro2 = "1.0.36" |
| 90 | quote = "1.0.15" | 90 | quote = "1.0.15" |
| 91 | #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} | 91 | #stm32-metapac = { version = "15", default-features = false, features = ["metadata"]} |
| 92 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-3cc1a1603e61881a6f0a1a47c12c16c57c245ba8", default-features = false, features = ["metadata"]} | 92 | stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-6097928f720646c73d6483a3245f922bd5faee2f", default-features = false, features = ["metadata"]} |
| 93 | 93 | ||
| 94 | 94 | ||
| 95 | [features] | 95 | [features] |
diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 35023bf1f..ee88d4541 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs | |||
| @@ -5,8 +5,7 @@ use std::{env, fs}; | |||
| 5 | 5 | ||
| 6 | use proc_macro2::{Ident, TokenStream}; | 6 | use proc_macro2::{Ident, TokenStream}; |
| 7 | use quote::{format_ident, quote}; | 7 | use quote::{format_ident, quote}; |
| 8 | use stm32_metapac::metadata::ir::{BlockItemInner, Enum, FieldSet}; | 8 | use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccKernelClock, StopMode, METADATA}; |
| 9 | use stm32_metapac::metadata::{MemoryRegionKind, PeripheralRccRegister, StopMode, METADATA}; | ||
| 10 | 9 | ||
| 11 | fn main() { | 10 | fn main() { |
| 12 | let target = env::var("TARGET").unwrap(); | 11 | let target = env::var("TARGET").unwrap(); |
| @@ -415,38 +414,6 @@ fn main() { | |||
| 415 | .unwrap(); | 414 | .unwrap(); |
| 416 | 415 | ||
| 417 | // ======== | 416 | // ======== |
| 418 | // Generate rcc fieldset and enum maps | ||
| 419 | let rcc_enum_map: HashMap<&str, HashMap<&str, &Enum>> = { | ||
| 420 | let rcc_blocks = rcc_registers.ir.blocks.iter().find(|b| b.name == "Rcc").unwrap().items; | ||
| 421 | let rcc_fieldsets: HashMap<&str, &FieldSet> = rcc_registers.ir.fieldsets.iter().map(|f| (f.name, f)).collect(); | ||
| 422 | let rcc_enums: HashMap<&str, &Enum> = rcc_registers.ir.enums.iter().map(|e| (e.name, e)).collect(); | ||
| 423 | |||
| 424 | rcc_blocks | ||
| 425 | .iter() | ||
| 426 | .filter_map(|b| match &b.inner { | ||
| 427 | BlockItemInner::Register(register) => register.fieldset.map(|f| (b.name, f)), | ||
| 428 | _ => None, | ||
| 429 | }) | ||
| 430 | .filter_map(|(b, f)| { | ||
| 431 | rcc_fieldsets.get(f).map(|f| { | ||
| 432 | ( | ||
| 433 | b, | ||
| 434 | f.fields | ||
| 435 | .iter() | ||
| 436 | .filter_map(|f| { | ||
| 437 | let enumm = f.enumm?; | ||
| 438 | let enumm = rcc_enums.get(enumm)?; | ||
| 439 | |||
| 440 | Some((f.name, *enumm)) | ||
| 441 | }) | ||
| 442 | .collect(), | ||
| 443 | ) | ||
| 444 | }) | ||
| 445 | }) | ||
| 446 | .collect() | ||
| 447 | }; | ||
| 448 | |||
| 449 | // ======== | ||
| 450 | // Generate RccPeripheral impls | 417 | // Generate RccPeripheral impls |
| 451 | 418 | ||
| 452 | // count how many times each xxENR field is used, to enable refcounting if used more than once. | 419 | // count how many times each xxENR field is used, to enable refcounting if used more than once. |
| @@ -494,8 +461,8 @@ fn main() { | |||
| 494 | 461 | ||
| 495 | let ptype = if let Some(reg) = &p.registers { reg.kind } else { "" }; | 462 | let ptype = if let Some(reg) = &p.registers { reg.kind } else { "" }; |
| 496 | let pname = format_ident!("{}", p.name); | 463 | let pname = format_ident!("{}", p.name); |
| 497 | let en_reg = format_ident!("{}", en.register); | 464 | let en_reg = format_ident!("{}", en.register.to_ascii_lowercase()); |
| 498 | let set_en_field = format_ident!("set_{}", en.field); | 465 | let set_en_field = format_ident!("set_{}", en.field.to_ascii_lowercase()); |
| 499 | 466 | ||
| 500 | let refcount = | 467 | let refcount = |
| 501 | force_refcount.contains(ptype) || *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; | 468 | force_refcount.contains(ptype) || *rcc_field_count.get(&(en.register, en.field)).unwrap() > 1; |
| @@ -523,21 +490,25 @@ fn main() { | |||
| 523 | (TokenStream::new(), TokenStream::new()) | 490 | (TokenStream::new(), TokenStream::new()) |
| 524 | }; | 491 | }; |
| 525 | 492 | ||
| 526 | let mux_for = |mux: Option<&'static PeripheralRccRegister>| { | 493 | let clock_frequency = match &rcc.kernel_clock { |
| 527 | let mux = mux?; | 494 | PeripheralRccKernelClock::Mux(mux) => { |
| 528 | let fieldset = rcc_enum_map.get(mux.register)?; | 495 | let ir = &rcc_registers.ir; |
| 529 | let enumm = fieldset.get(mux.field)?; | 496 | let fieldset_name = mux.register.to_ascii_lowercase(); |
| 530 | 497 | let fieldset = ir | |
| 531 | Some((mux, *enumm)) | 498 | .fieldsets |
| 532 | }; | 499 | .iter() |
| 533 | 500 | .find(|i| i.name.eq_ignore_ascii_case(&fieldset_name)) | |
| 534 | let clock_frequency = match mux_for(rcc.mux.as_ref()) { | 501 | .unwrap(); |
| 535 | Some((mux, rcc_enumm)) => { | 502 | let field_name = mux.field.to_ascii_lowercase(); |
| 536 | let fieldset_name = format_ident!("{}", mux.register); | 503 | let field = fieldset.fields.iter().find(|i| i.name == field_name).unwrap(); |
| 537 | let field_name = format_ident!("{}", mux.field); | 504 | let enum_name = field.enumm.unwrap(); |
| 538 | let enum_name = format_ident!("{}", rcc_enumm.name); | 505 | let enumm = ir.enums.iter().find(|i| i.name == enum_name).unwrap(); |
| 539 | 506 | ||
| 540 | let match_arms: TokenStream = rcc_enumm | 507 | let fieldset_name = format_ident!("{}", fieldset_name); |
| 508 | let field_name = format_ident!("{}", field_name); | ||
| 509 | let enum_name = format_ident!("{}", enum_name); | ||
| 510 | |||
| 511 | let match_arms: TokenStream = enumm | ||
| 541 | .variants | 512 | .variants |
| 542 | .iter() | 513 | .iter() |
| 543 | .filter(|v| v.name != "DISABLE") | 514 | .filter(|v| v.name != "DISABLE") |
| @@ -561,9 +532,10 @@ fn main() { | |||
| 561 | } | 532 | } |
| 562 | } | 533 | } |
| 563 | } | 534 | } |
| 564 | None => { | 535 | PeripheralRccKernelClock::Clock(clock) => { |
| 565 | let clock_name = format_ident!("{}", rcc.clock); | 536 | let clock = clock.to_ascii_lowercase(); |
| 566 | clock_names.insert(rcc.clock.to_string()); | 537 | let clock_name = format_ident!("{}", clock); |
| 538 | clock_names.insert(clock.to_string()); | ||
| 567 | quote! { | 539 | quote! { |
| 568 | unsafe { crate::rcc::get_freqs().#clock_name.unwrap() } | 540 | unsafe { crate::rcc::get_freqs().#clock_name.unwrap() } |
| 569 | } | 541 | } |
diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs index 47ce4783c..fbf2d1cf9 100644 --- a/embassy-stm32/src/rcc/wba.rs +++ b/embassy-stm32/src/rcc/wba.rs | |||
| @@ -49,7 +49,7 @@ impl Default for Config { | |||
| 49 | apb2_pre: APBPrescaler::DIV1, | 49 | apb2_pre: APBPrescaler::DIV1, |
| 50 | apb7_pre: APBPrescaler::DIV1, | 50 | apb7_pre: APBPrescaler::DIV1, |
| 51 | ls: Default::default(), | 51 | ls: Default::default(), |
| 52 | adc_clock_source: AdcClockSource::HCLK1, | 52 | adc_clock_source: AdcClockSource::HCLK4, |
| 53 | voltage_scale: VoltageScale::RANGE2, | 53 | voltage_scale: VoltageScale::RANGE2, |
| 54 | } | 54 | } |
| 55 | } | 55 | } |
