diff options
| -rw-r--r-- | embassy-stm32/src/usart/buffered.rs | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 530760bd1..086196a2c 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs | |||
| @@ -21,8 +21,10 @@ impl<T: BasicInstance> interrupt::typelevel::Handler<T::Interrupt> for Interrupt | |||
| 21 | // RX | 21 | // RX |
| 22 | unsafe { | 22 | unsafe { |
| 23 | let sr = sr(r).read(); | 23 | let sr = sr(r).read(); |
| 24 | // Reading DR clears the rxne, error and idle interrupt flags on v1. | 24 | // On v1 & v2, reading DR clears the rxne, error and idle interrupt |
| 25 | let dr = if sr.ore() || sr.idle() || sr.rxne() { | 25 | // flags. Keep this close to the SR read to reduce the chance of a |
| 26 | // flag being set in-between. | ||
| 27 | let dr = if sr.rxne() || cfg!(any(usart_v1, usart_v2)) && (sr.ore() || sr.idle()) { | ||
| 26 | Some(rdr(r).read_volatile()) | 28 | Some(rdr(r).read_volatile()) |
| 27 | } else { | 29 | } else { |
| 28 | None | 30 | None |