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-rw-r--r--embassy-stm32/src/i2c/mod.rs4
-rw-r--r--embassy-stm32/src/i2c/v1.rs6
2 files changed, 10 insertions, 0 deletions
diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
index 9a91e2f25..d4d4aec5d 100644
--- a/embassy-stm32/src/i2c/mod.rs
+++ b/embassy-stm32/src/i2c/mod.rs
@@ -415,6 +415,10 @@ fn operation_frames<'a, 'b: 'a>(
415 415
416 // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an 416 // Check empty read buffer before starting transaction. Otherwise, we would risk halting with an
417 // error in the middle of the transaction. 417 // error in the middle of the transaction.
418 //
419 // In principle, we could allow empty read frames within consecutive read operations, as long as
420 // at least one byte remains in the final (merged) read operation, but that makes the logic more
421 // complicated and error-prone.
418 if operations.iter().any(|op| match op { 422 if operations.iter().any(|op| match op {
419 Operation::Read(read) => read.is_empty(), 423 Operation::Read(read) => read.is_empty(),
420 Operation::Write(_) => false, 424 Operation::Write(_) => false,
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index 5c57a9ccc..d45c48b24 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -669,6 +669,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
669 RXDMA: crate::i2c::RxDma<T>, 669 RXDMA: crate::i2c::RxDma<T>,
670 TXDMA: crate::i2c::TxDma<T>, 670 TXDMA: crate::i2c::TxDma<T>,
671 { 671 {
672 // Check empty read buffer before starting transaction. Otherwise, we would not generate the
673 // stop condition below.
674 if read.is_empty() {
675 return Err(Error::Overrun);
676 }
677
672 self.write_frame(address, write, FrameOptions::FirstFrame).await?; 678 self.write_frame(address, write, FrameOptions::FirstFrame).await?;
673 self.read_frame(address, read, FrameOptions::FirstAndLastFrame).await 679 self.read_frame(address, read, FrameOptions::FirstAndLastFrame).await
674 } 680 }