4 files changed, 9 insertions, 79 deletions

diff --git a/embassy-stm32/src/rcc/bd.rs b/embassy-stm32/src/rcc/bd.rs
index b4d21c35f..34b88458f 100644
--- a/embassy-stm32/src/rcc/bd.rs
+++ b/embassy-stm32/src/rcc/bd.rs
@@ -95,7 +95,7 @@ impl BackupDomain {
     }
 
     #[allow(dead_code, unused_variables)]
-    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
+    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3))]
     pub fn enable_lse(lse_drive: LseDrive) {
         Self::modify(|w| {
             #[cfg(any(rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l4))]
@@ -107,7 +107,7 @@ impl BackupDomain {
     }
 
     #[allow(dead_code)]
-    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
+    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3))]
     pub fn enable_lsi() {
         let csr = crate::pac::RCC.csr();
 
@@ -146,7 +146,7 @@ impl BackupDomain {
         });
     }
 
-    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb))]
+    #[cfg(any(rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3))]
     #[allow(dead_code, unused_variables)]
     pub fn configure_rtc(clock_source: RtcClockSource, lse_drive: Option<LseDrive>) {
         match clock_source {
diff --git a/embassy-stm32/src/rcc/l4.rs b/embassy-stm32/src/rcc/l4.rs
index c6bccfd26..0083ae5bb 100644
--- a/embassy-stm32/src/rcc/l4.rs
+++ b/embassy-stm32/src/rcc/l4.rs
@@ -2,13 +2,13 @@ use core::marker::PhantomData;
 
 use embassy_hal_internal::into_ref;
 use stm32_metapac::rcc::regs::Cfgr;
-use stm32_metapac::rcc::vals::{Lsedrv, Mcopre, Mcosel};
+use stm32_metapac::rcc::vals::{Mcopre, Mcosel};
 
 pub use super::bus::{AHBPrescaler, APBPrescaler};
 use crate::gpio::sealed::AFType;
 use crate::gpio::Speed;
 use crate::pac::rcc::vals::{Hpre, Msirange, Pllsrc, Ppre, Sw};
-use crate::pac::{FLASH, PWR, RCC};
+use crate::pac::{FLASH, RCC};
 use crate::rcc::bd::{BackupDomain, RtcClockSource};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;
@@ -407,36 +407,7 @@ pub(crate) unsafe fn init(config: Config) {
 
     RCC.apb1enr1().modify(|w| w.set_pwren(true));
 
-    match config.rtc_mux {
-        RtcClockSource::LSE => {
-            // 1. Unlock the backup domain
-            PWR.cr1().modify(|w| w.set_dbp(true));
-
-            // 2. Setup the LSE
-            RCC.bdcr().modify(|w| {
-                // Enable LSE
-                w.set_lseon(true);
-                // Max drive strength
-                // TODO: should probably be settable
-                w.set_lsedrv(Lsedrv::HIGH);
-            });
-
-            // Wait until LSE is running
-            while !RCC.bdcr().read().lserdy() {}
-
-            BackupDomain::set_rtc_clock_source(RtcClockSource::LSE);
-        }
-        RtcClockSource::LSI => {
-            // Turn on the internal 32 kHz LSI oscillator
-            RCC.csr().modify(|w| w.set_lsion(true));
-
-            // Wait until LSI is running
-            while !RCC.csr().read().lsirdy() {}
-
-            BackupDomain::set_rtc_clock_source(RtcClockSource::LSI);
-        }
-        _ => unreachable!(),
-    }
+    BackupDomain::configure_rtc(config.rtc_mux, None);
 
     let (sys_clk, sw) = match config.mux {
         ClockSrc::MSI(range) => {
diff --git a/embassy-stm32/src/rcc/wb.rs b/embassy-stm32/src/rcc/wb.rs
index 6496b41e1..efd964642 100644
--- a/embassy-stm32/src/rcc/wb.rs
+++ b/embassy-stm32/src/rcc/wb.rs
@@ -293,18 +293,6 @@ pub(crate) fn configure_clocks(config: &Config) {
         while !rcc.cr().read().hsirdy() {}
     }
 
-    let needs_lsi = if let Some(rtc_mux) = &config.rtc {
-        *rtc_mux == RtcClockSource::LSI
-    } else {
-        false
-    };
-
-    if needs_lsi {
-        rcc.csr().modify(|w| w.set_lsi1on(true));
-
-        while !rcc.csr().read().lsi1rdy() {}
-    }
-
     match &config.lse {
         Some(_) => {
             rcc.cfgr().modify(|w| w.set_stopwuck(true));
@@ -378,5 +366,5 @@ pub(crate) fn configure_clocks(config: &Config) {
 
     config
         .rtc
-        .map(|clock_source| BackupDomain::set_rtc_clock_source(clock_source));
+        .map(|clock_source| BackupDomain::configure_rtc(clock_source, None));
 }
diff --git a/embassy-stm32/src/rcc/wl.rs b/embassy-stm32/src/rcc/wl.rs
index e33690d10..b3ddbae64 100644
--- a/embassy-stm32/src/rcc/wl.rs
+++ b/embassy-stm32/src/rcc/wl.rs
@@ -1,5 +1,5 @@
 pub use super::bus::{AHBPrescaler, APBPrescaler, VoltageScale};
-use crate::pac::{FLASH, PWR, RCC};
+use crate::pac::{FLASH, RCC};
 use crate::rcc::bd::{BackupDomain, RtcClockSource};
 use crate::rcc::{set_freqs, Clocks};
 use crate::time::Hertz;
@@ -208,36 +208,7 @@ pub(crate) unsafe fn init(config: Config) {
 
     while FLASH.acr().read().latency() != ws {}
 
-    match config.rtc_mux {
-        RtcClockSource::LSE => {
-            // 1. Unlock the backup domain
-            PWR.cr1().modify(|w| w.set_dbp(true));
-
-            // 2. Setup the LSE
-            RCC.bdcr().modify(|w| {
-                // Enable LSE
-                w.set_lseon(true);
-                // Max drive strength
-                // TODO: should probably be settable
-                w.set_lsedrv(Lsedrv::High as u8); //---// PAM - should not be commented
-            });
-
-            // Wait until LSE is running
-            while !RCC.bdcr().read().lserdy() {}
-
-            BackupDomain::set_rtc_clock_source(RtcClockSource::LSE);
-        }
-        RtcClockSource::LSI => {
-            // Turn on the internal 32 kHz LSI oscillator
-            RCC.csr().modify(|w| w.set_lsion(true));
-
-            // Wait until LSI is running
-            while !RCC.csr().read().lsirdy() {}
-
-            BackupDomain::set_rtc_clock_source(RtcClockSource::LSI);
-        }
-        _ => unreachable!(),
-    }
+    BackupDomain::configure_rtc(config.rtc_mux, None);
 
     match config.mux {
         ClockSrc::HSI16 => {