3 files changed, 74 insertions, 37 deletions

diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index 835d9c704..80261ae41 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -25,6 +25,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - feat: Add USB CRS sync support for STM32C071
 - fix: RTC register definition for STM32L4P5 and L4Q5 as they use v3 register map.
 - fix: Cut down the capabilities of the STM32L412 and L422 RTC as those are missing binary timer mode and underflow interrupt.
+- fix: Allow configuration of the internal pull up/down resistors on the pins for the Qei peripheral, as well as the Qei decoder mode.
 
 ## 0.4.0 - 2025-08-26
 
diff --git a/embassy-stm32/src/timer/qei.rs b/embassy-stm32/src/timer/qei.rs
index 82b5968b0..bb152731c 100644
--- a/embassy-stm32/src/timer/qei.rs
+++ b/embassy-stm32/src/timer/qei.rs
@@ -1,8 +1,6 @@
 //! Quadrature decoder using a timer.
 
-use core::marker::PhantomData;
-
-use stm32_metapac::timer::vals;
+use stm32_metapac::timer::vals::{self, Sms};
 
 use super::low_level::Timer;
 pub use super::{Ch1, Ch2};
@@ -11,35 +9,59 @@ use crate::gpio::{AfType, AnyPin, Pull};
 use crate::timer::TimerChannel;
 use crate::Peri;
 
-/// Counting direction
-pub enum Direction {
-    /// Counting up.
-    Upcounting,
-    /// Counting down.
-    Downcounting,
+/// Qei driver config.
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(Clone, Copy)]
+pub struct Config {
+    /// Configures the internal pull up/down resistor for Qei's channel 1 pin.
+    pub ch1_pull: Pull,
+    /// Configures the internal pull up/down resistor for Qei's channel 2 pin.
+    pub ch2_pull: Pull,
+    /// Specifies the encoder mode to use for the Qei peripheral.
+    pub mode: QeiMode,
 }
 
-/// Wrapper for using a pin with QEI.
-pub struct QeiPin<'d, T, Channel, #[cfg(afio)] A> {
-    #[allow(unused)]
-    pin: Peri<'d, AnyPin>,
-    phantom: PhantomData<if_afio!((T, Channel, A))>,
+impl Default for Config {
+    /// Arbitrary defaults to preserve backwards compatibility
+    fn default() -> Self {
+        Self {
+            ch1_pull: Pull::None,
+            ch2_pull: Pull::None,
+            mode: QeiMode::Mode3,
+        }
+    }
 }
 
-impl<'d, T: GeneralInstance4Channel, C: QeiChannel, #[cfg(afio)] A> if_afio!(QeiPin<'d, T, C, A>) {
-    /// Create a new QEI pin instance.
-    pub fn new(pin: Peri<'d, if_afio!(impl TimerPin<T, C, A>)>) -> Self {
-        critical_section::with(|_| {
-            pin.set_low();
-            set_as_af!(pin, AfType::input(Pull::None));
-        });
-        QeiPin {
-            pin: pin.into(),
-            phantom: PhantomData,
+/// See STMicro AN4013 for §2.3 for more information
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[derive(Clone, Copy)]
+pub enum QeiMode {
+    /// Direct alias for [`Sms::ENCODER_MODE_1`]
+    Mode1,
+    /// Direct alias for [`Sms::ENCODER_MODE_2`]
+    Mode2,
+    /// Direct alias for [`Sms::ENCODER_MODE_3`]
+    Mode3,
+}
+
+impl From<QeiMode> for Sms {
+    fn from(mode: QeiMode) -> Self {
+        match mode {
+            QeiMode::Mode1 => Sms::ENCODER_MODE_1,
+            QeiMode::Mode2 => Sms::ENCODER_MODE_2,
+            QeiMode::Mode3 => Sms::ENCODER_MODE_3,
         }
     }
 }
 
+/// Counting direction
+pub enum Direction {
+    /// Counting up.
+    Upcounting,
+    /// Counting down.
+    Downcounting,
+}
+
 trait SealedQeiChannel: TimerChannel {}
 
 /// Marker trait for a timer channel eligible for use with QEI.
@@ -55,20 +77,28 @@ impl SealedQeiChannel for Ch2 {}
 /// Quadrature decoder driver.
 pub struct Qei<'d, T: GeneralInstance4Channel> {
     inner: Timer<'d, T>,
+    _ch1: Peri<'d, AnyPin>,
+    _ch2: Peri<'d, AnyPin>,
 }
 
 impl<'d, T: GeneralInstance4Channel> Qei<'d, T> {
-    /// Create a new quadrature decoder driver.
+    /// Create a new quadrature decoder driver, with a given [`Config`].
     #[allow(unused)]
-    pub fn new<#[cfg(afio)] A>(
+    pub fn new<CH1: QeiChannel, CH2: QeiChannel, #[cfg(afio)] A>(
         tim: Peri<'d, T>,
-        ch1: if_afio!(QeiPin<'d, T, Ch1, A>),
-        ch2: if_afio!(QeiPin<'d, T, Ch2, A>),
+        ch1: Peri<'d, if_afio!(impl TimerPin<T, CH1, A>)>,
+        ch2: Peri<'d, if_afio!(impl TimerPin<T, CH2, A>)>,
+        config: Config,
     ) -> Self {
-        Self::new_inner(tim)
-    }
+        // Configure the pins to be used for the QEI peripheral.
+        critical_section::with(|_| {
+            ch1.set_low();
+            set_as_af!(ch1, AfType::input(config.ch1_pull));
+
+            ch2.set_low();
+            set_as_af!(ch2, AfType::input(config.ch2_pull));
+        });
 
-    fn new_inner(tim: Peri<'d, T>) -> Self {
         let inner = Timer::new(tim);
         let r = inner.regs_gp16();
 
@@ -88,13 +118,17 @@ impl<'d, T: GeneralInstance4Channel> Qei<'d, T> {
         });
 
         r.smcr().modify(|w| {
-            w.set_sms(vals::Sms::ENCODER_MODE_3);
+            w.set_sms(config.mode.into());
         });
 
         r.arr().modify(|w| w.set_arr(u16::MAX));
         r.cr1().modify(|w| w.set_cen(true));
 
-        Self { inner }
+        Self {
+            inner,
+            _ch1: ch1.into(),
+            _ch2: ch2.into(),
+        }
     }
 
     /// Get direction.
diff --git a/tests/stm32/src/bin/afio.rs b/tests/stm32/src/bin/afio.rs
index cc44dc59c..81d50874b 100644
--- a/tests/stm32/src/bin/afio.rs
+++ b/tests/stm32/src/bin/afio.rs
@@ -12,8 +12,9 @@ use embassy_stm32::time::khz;
 use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin};
 use embassy_stm32::timer::input_capture::{CapturePin, InputCapture};
 use embassy_stm32::timer::pwm_input::PwmInput;
-use embassy_stm32::timer::qei::{Qei, QeiPin};
+use embassy_stm32::timer::qei::Qei;
 use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm};
+use embassy_stm32::timer::{Ch1, Ch2};
 use embassy_stm32::usart::{Uart, UartRx, UartTx};
 use embassy_stm32::{bind_interrupts, Peripherals};
 
@@ -258,10 +259,11 @@ async fn main(_spawner: Spawner) {
     {
         // partial remap
         reset_afio_registers();
-        Qei::new::<AfioRemap<1>>(
+        Qei::new::<Ch1, Ch2, AfioRemap<1>>(
             p.TIM1.reborrow(),
-            QeiPin::new(p.PA8.reborrow()),
-            QeiPin::new(p.PA9.reborrow()),
+            p.PA8.reborrow(),
+            p.PA9.reborrow(),
+            Default::default(),
         );
         defmt::assert_eq!(AFIO.mapr().read().tim1_remap(), 1);
     }