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-rw-r--r--embassy-stm32/src/rcc/f4f7.rs18
1 files changed, 12 insertions, 6 deletions
diff --git a/embassy-stm32/src/rcc/f4f7.rs b/embassy-stm32/src/rcc/f4f7.rs
index de37eab72..3f9a2be67 100644
--- a/embassy-stm32/src/rcc/f4f7.rs
+++ b/embassy-stm32/src/rcc/f4f7.rs
@@ -2,7 +2,7 @@ pub use crate::pac::rcc::vals::{
2 Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource, 2 Hpre as AHBPrescaler, Pllm as PllPreDiv, Plln as PllMul, Pllp, Pllq, Pllr, Pllsrc as PllSource,
3 Ppre as APBPrescaler, Sw as Sysclk, 3 Ppre as APBPrescaler, Sw as Sysclk,
4}; 4};
5use crate::pac::{FLASH, PWR, RCC}; 5use crate::pac::{FLASH, RCC};
6use crate::rcc::{set_freqs, Clocks}; 6use crate::rcc::{set_freqs, Clocks};
7use crate::time::Hertz; 7use crate::time::Hertz;
8 8
@@ -101,11 +101,17 @@ impl Default for Config {
101 101
102pub(crate) unsafe fn init(config: Config) { 102pub(crate) unsafe fn init(config: Config) {
103 // always enable overdrive for now. Make it configurable in the future. 103 // always enable overdrive for now. Make it configurable in the future.
104 PWR.cr1().modify(|w| w.set_oden(true)); 104 #[cfg(not(any(
105 while !PWR.csr1().read().odrdy() {} 105 stm32f401, stm32f410, stm32f411, stm32f412, stm32f413, stm32f423, stm32f405, stm32f407, stm32f415, stm32f417
106 106 )))]
107 PWR.cr1().modify(|w| w.set_odswen(true)); 107 {
108 while !PWR.csr1().read().odswrdy() {} 108 use crate::pac::PWR;
109 PWR.cr1().modify(|w| w.set_oden(true));
110 while !PWR.csr1().read().odrdy() {}
111
112 PWR.cr1().modify(|w| w.set_odswen(true));
113 while !PWR.csr1().read().odswrdy() {}
114 }
109 115
110 // Configure HSI 116 // Configure HSI
111 let hsi = match config.hsi { 117 let hsi = match config.hsi {