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-rw-r--r--embassy-stm32/src/rcc/f4/mod.rs28
-rw-r--r--examples/stm32f4/src/bin/usart.rs4
2 files changed, 14 insertions, 18 deletions
diff --git a/embassy-stm32/src/rcc/f4/mod.rs b/embassy-stm32/src/rcc/f4/mod.rs
index 1cf3e5bd9..eab98daf8 100644
--- a/embassy-stm32/src/rcc/f4/mod.rs
+++ b/embassy-stm32/src/rcc/f4/mod.rs
@@ -63,7 +63,7 @@ impl<'d> Rcc<'d> {
63 } 63 }
64 64
65 let sysclk = if sysclk_on_pll { 65 let sysclk = if sysclk_on_pll {
66 plls.pllsysclk.unwrap() 66 unwrap!(plls.pllsysclk)
67 } else { 67 } else {
68 sysclk 68 sysclk
69 }; 69 };
@@ -245,13 +245,11 @@ impl<'d> Rcc<'d> {
245 245
246 // Find the lowest pllm value that minimize the difference between 246 // Find the lowest pllm value that minimize the difference between
247 // target frequency and the real vco_out frequency. 247 // target frequency and the real vco_out frequency.
248 let pllm = (pllm_min..=pllm_max) 248 let pllm = unwrap!((pllm_min..=pllm_max).min_by_key(|pllm| {
249 .min_by_key(|pllm| { 249 let vco_in = pllsrcclk / pllm;
250 let vco_in = pllsrcclk / pllm; 250 let plln = target_freq / vco_in;
251 let plln = target_freq / vco_in; 251 target_freq - vco_in * plln
252 target_freq - vco_in * plln 252 }));
253 })
254 .unwrap();
255 253
256 let vco_in = pllsrcclk / pllm; 254 let vco_in = pllsrcclk / pllm;
257 assert!((1_000_000..=2_000_000).contains(&vco_in)); 255 assert!((1_000_000..=2_000_000).contains(&vco_in));
@@ -261,14 +259,12 @@ impl<'d> Rcc<'d> {
261 let plln = if pll48clk { 259 let plln = if pll48clk {
262 // try the different valid pllq according to the valid 260 // try the different valid pllq according to the valid
263 // main scaller values, and take the best 261 // main scaller values, and take the best
264 let pllq = (4..=9) 262 let pllq = unwrap!((4..=9).min_by_key(|pllq| {
265 .min_by_key(|pllq| { 263 let plln = 48_000_000 * pllq / vco_in;
266 let plln = 48_000_000 * pllq / vco_in; 264 let pll48_diff = 48_000_000 - vco_in * plln / pllq;
267 let pll48_diff = 48_000_000 - vco_in * plln / pllq; 265 let sysclk_diff = (sysclk as i32 - (vco_in * plln / sysclk_div) as i32).abs();
268 let sysclk_diff = (sysclk as i32 - (vco_in * plln / sysclk_div) as i32).abs(); 266 (pll48_diff, sysclk_diff)
269 (pll48_diff, sysclk_diff) 267 }));
270 })
271 .unwrap();
272 48_000_000 * pllq / vco_in 268 48_000_000 * pllq / vco_in
273 } else { 269 } else {
274 sysclk * sysclk_div / vco_in 270 sysclk * sysclk_div / vco_in
diff --git a/examples/stm32f4/src/bin/usart.rs b/examples/stm32f4/src/bin/usart.rs
index fd4f19e20..781c6a958 100644
--- a/examples/stm32f4/src/bin/usart.rs
+++ b/examples/stm32f4/src/bin/usart.rs
@@ -31,7 +31,7 @@ fn main() -> ! {
31 31
32 let mut buf = [0u8; 1]; 32 let mut buf = [0u8; 1];
33 loop { 33 loop {
34 unwrap!(usart.read_blocking(&mut buf).unwbrap()); 34 unwrap!(usart.read_blocking(&mut buf));
35 unwrap!(usart.bwrite_all(&buf).unwrap()); 35 unwrap!(usart.bwrite_all(&buf));
36 } 36 }
37} 37}