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-rw-r--r--embassy-executor/src/arch/riscv32.rs7
1 files changed, 6 insertions, 1 deletions
diff --git a/embassy-executor/src/arch/riscv32.rs b/embassy-executor/src/arch/riscv32.rs
index e095c0ee0..76eb8b114 100644
--- a/embassy-executor/src/arch/riscv32.rs
+++ b/embassy-executor/src/arch/riscv32.rs
@@ -54,7 +54,12 @@ impl Executor {
54 loop { 54 loop {
55 unsafe { 55 unsafe {
56 self.inner.poll(); 56 self.inner.poll();
57 core::arch::asm!("wfi"); 57 // we do not care about race conditions between the load and store operations, interrupts
58 // will only set this value to true.
59 // if there is work to do, loop back to polling
60 if !SIGNAL_WORK_THREAD_MODE.fetch_and(false, Ordering::SeqCst) {
61 core::arch::asm!("wfi");
62 }
58 } 63 }
59 } 64 }
60 } 65 }