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-rw-r--r--embassy-hal-common/src/peripheral.rs4
-rw-r--r--embassy-nrf/src/buffered_uarte.rs9
-rw-r--r--embassy-nrf/src/gpio.rs22
-rw-r--r--embassy-nrf/src/ppi/mod.rs16
-rw-r--r--embassy-nrf/src/pwm.rs60
-rw-r--r--embassy-nrf/src/qdec.rs8
-rw-r--r--embassy-nrf/src/qspi.rs19
-rw-r--r--embassy-nrf/src/spim.rs19
-rw-r--r--embassy-nrf/src/uarte.rs61
-rw-r--r--embassy-rp/src/gpio.rs24
-rw-r--r--embassy-rp/src/spi.rs19
11 files changed, 156 insertions, 105 deletions
diff --git a/embassy-hal-common/src/peripheral.rs b/embassy-hal-common/src/peripheral.rs
index cd0cb8dcb..99df4b894 100644
--- a/embassy-hal-common/src/peripheral.rs
+++ b/embassy-hal-common/src/peripheral.rs
@@ -43,10 +43,6 @@ impl<'a, T> PeripheralRef<'a, T> {
43 _lifetime: PhantomData, 43 _lifetime: PhantomData,
44 } 44 }
45 } 45 }
46
47 pub unsafe fn into_inner(self) -> T {
48 self.inner
49 }
50} 46}
51 47
52impl<'a, T> Deref for PeripheralRef<'a, T> { 48impl<'a, T> Deref for PeripheralRef<'a, T> {
diff --git a/embassy-nrf/src/buffered_uarte.rs b/embassy-nrf/src/buffered_uarte.rs
index 48ffe5c29..036af3804 100644
--- a/embassy-nrf/src/buffered_uarte.rs
+++ b/embassy-nrf/src/buffered_uarte.rs
@@ -147,8 +147,7 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
147 timer.cc(0).short_compare_stop(); 147 timer.cc(0).short_compare_stop();
148 148
149 let mut ppi_ch1 = Ppi::new_one_to_two( 149 let mut ppi_ch1 = Ppi::new_one_to_two(
150 //TODO: Avoid into_inner? 150 ppi_ch1.map_into(),
151 unsafe { ppi_ch1.into_inner() }.degrade(),
152 Event::from_reg(&r.events_rxdrdy), 151 Event::from_reg(&r.events_rxdrdy),
153 timer.task_clear(), 152 timer.task_clear(),
154 timer.task_start(), 153 timer.task_start(),
@@ -156,16 +155,14 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
156 ppi_ch1.enable(); 155 ppi_ch1.enable();
157 156
158 let mut ppi_ch2 = Ppi::new_one_to_one( 157 let mut ppi_ch2 = Ppi::new_one_to_one(
159 //TODO: Avoid into_inner? 158 ppi_ch2.map_into(),
160 unsafe { ppi_ch2.into_inner() }.degrade(),
161 timer.cc(0).event_compare(), 159 timer.cc(0).event_compare(),
162 Task::from_reg(&r.tasks_stoprx), 160 Task::from_reg(&r.tasks_stoprx),
163 ); 161 );
164 ppi_ch2.enable(); 162 ppi_ch2.enable();
165 163
166 Self { 164 Self {
167 //TODO: Avoid into_inner? 165 inner: PeripheralMutex::new(irq, &mut state.0, move || StateInner {
168 inner: PeripheralMutex::new(unsafe { irq.into_inner() }, &mut state.0, move || StateInner {
169 phantom: PhantomData, 166 phantom: PhantomData,
170 timer, 167 timer,
171 _ppi_ch1: ppi_ch1, 168 _ppi_ch1: ppi_ch1,
diff --git a/embassy-nrf/src/gpio.rs b/embassy-nrf/src/gpio.rs
index ae08d859a..a61ff6aa5 100644
--- a/embassy-nrf/src/gpio.rs
+++ b/embassy-nrf/src/gpio.rs
@@ -374,7 +374,7 @@ pub(crate) mod sealed {
374 } 374 }
375} 375}
376 376
377pub trait Pin: Peripheral<P = Self> + sealed::Pin + Sized + 'static { 377pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
378 /// Number of the pin within the port (0..31) 378 /// Number of the pin within the port (0..31)
379 #[inline] 379 #[inline]
380 fn pin(&self) -> u8 { 380 fn pin(&self) -> u8 {
@@ -416,20 +416,6 @@ impl AnyPin {
416 pub unsafe fn steal(pin_port: u8) -> Self { 416 pub unsafe fn steal(pin_port: u8) -> Self {
417 Self { pin_port } 417 Self { pin_port }
418 } 418 }
419
420 pub(crate) fn into_degraded_ref<'a>(pin: impl Peripheral<P = impl Pin + 'a> + 'a) -> PeripheralRef<'a, Self> {
421 PeripheralRef::new(AnyPin {
422 pin_port: pin.into_ref().pin_port(),
423 })
424 }
425}
426
427macro_rules! into_degraded_ref {
428 ($($name:ident),*) => {
429 $(
430 let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
431 )*
432 };
433} 419}
434 420
435impl_peripheral!(AnyPin); 421impl_peripheral!(AnyPin);
@@ -475,6 +461,12 @@ macro_rules! impl_pin {
475 $port_num * 32 + $pin_num 461 $port_num * 32 + $pin_num
476 } 462 }
477 } 463 }
464
465 impl From<peripherals::$type> for crate::gpio::AnyPin {
466 fn from(val: peripherals::$type) -> Self {
467 crate::gpio::Pin::degrade(val)
468 }
469 }
478 }; 470 };
479} 471}
480 472
diff --git a/embassy-nrf/src/ppi/mod.rs b/embassy-nrf/src/ppi/mod.rs
index 796de2170..23ab011bc 100644
--- a/embassy-nrf/src/ppi/mod.rs
+++ b/embassy-nrf/src/ppi/mod.rs
@@ -92,11 +92,11 @@ pub trait Channel: sealed::Channel + Peripheral<P = Self> + Sized {
92 fn number(&self) -> usize; 92 fn number(&self) -> usize;
93} 93}
94 94
95pub trait ConfigurableChannel: Channel { 95pub trait ConfigurableChannel: Channel + Into<AnyConfigurableChannel> {
96 fn degrade(self) -> AnyConfigurableChannel; 96 fn degrade(self) -> AnyConfigurableChannel;
97} 97}
98 98
99pub trait StaticChannel: Channel { 99pub trait StaticChannel: Channel + Into<AnyStaticChannel> {
100 fn degrade(self) -> AnyStaticChannel; 100 fn degrade(self) -> AnyStaticChannel;
101} 101}
102 102
@@ -167,6 +167,12 @@ macro_rules! impl_ppi_channel {
167 } 167 }
168 } 168 }
169 } 169 }
170
171 impl From<peripherals::$type> for crate::ppi::AnyStaticChannel {
172 fn from(val: peripherals::$type) -> Self {
173 crate::ppi::StaticChannel::degrade(val)
174 }
175 }
170 }; 176 };
171 ($type:ident, $number:expr => configurable) => { 177 ($type:ident, $number:expr => configurable) => {
172 impl_ppi_channel!($type, $number); 178 impl_ppi_channel!($type, $number);
@@ -178,6 +184,12 @@ macro_rules! impl_ppi_channel {
178 } 184 }
179 } 185 }
180 } 186 }
187
188 impl From<peripherals::$type> for crate::ppi::AnyConfigurableChannel {
189 fn from(val: peripherals::$type) -> Self {
190 crate::ppi::ConfigurableChannel::degrade(val)
191 }
192 }
181 }; 193 };
182} 194}
183 195
diff --git a/embassy-nrf/src/pwm.rs b/embassy-nrf/src/pwm.rs
index 603fd8efd..ecc674ce0 100644
--- a/embassy-nrf/src/pwm.rs
+++ b/embassy-nrf/src/pwm.rs
@@ -3,7 +3,7 @@
3use core::marker::PhantomData; 3use core::marker::PhantomData;
4use core::sync::atomic::{compiler_fence, Ordering}; 4use core::sync::atomic::{compiler_fence, Ordering};
5 5
6use embassy_hal_common::PeripheralRef; 6use embassy_hal_common::{into_ref, PeripheralRef};
7 7
8use crate::gpio::sealed::Pin as _; 8use crate::gpio::sealed::Pin as _;
9use crate::gpio::{AnyPin, Pin as GpioPin, PselBits}; 9use crate::gpio::{AnyPin, Pin as GpioPin, PselBits};
@@ -55,8 +55,8 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
55 ch0: impl Peripheral<P = impl GpioPin> + 'd, 55 ch0: impl Peripheral<P = impl GpioPin> + 'd,
56 config: Config, 56 config: Config,
57 ) -> Result<Self, Error> { 57 ) -> Result<Self, Error> {
58 into_degraded_ref!(ch0); 58 into_ref!(ch0);
59 Self::new_inner(pwm, Some(ch0), None, None, None, config) 59 Self::new_inner(pwm, Some(ch0.map_into()), None, None, None, config)
60 } 60 }
61 61
62 /// Create a new 2-channel PWM 62 /// Create a new 2-channel PWM
@@ -67,8 +67,8 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
67 ch1: impl Peripheral<P = impl GpioPin> + 'd, 67 ch1: impl Peripheral<P = impl GpioPin> + 'd,
68 config: Config, 68 config: Config,
69 ) -> Result<Self, Error> { 69 ) -> Result<Self, Error> {
70 into_degraded_ref!(ch0, ch1); 70 into_ref!(ch0, ch1);
71 Self::new_inner(pwm, Some(ch0), Some(ch1), None, None, config) 71 Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None, config)
72 } 72 }
73 73
74 /// Create a new 3-channel PWM 74 /// Create a new 3-channel PWM
@@ -80,8 +80,15 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
80 ch2: impl Peripheral<P = impl GpioPin> + 'd, 80 ch2: impl Peripheral<P = impl GpioPin> + 'd,
81 config: Config, 81 config: Config,
82 ) -> Result<Self, Error> { 82 ) -> Result<Self, Error> {
83 into_degraded_ref!(ch0, ch1, ch2); 83 into_ref!(ch0, ch1, ch2);
84 Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), None, config) 84 Self::new_inner(
85 pwm,
86 Some(ch0.map_into()),
87 Some(ch1.map_into()),
88 Some(ch2.map_into()),
89 None,
90 config,
91 )
85 } 92 }
86 93
87 /// Create a new 4-channel PWM 94 /// Create a new 4-channel PWM
@@ -94,8 +101,15 @@ impl<'d, T: Instance> SequencePwm<'d, T> {
94 ch3: impl Peripheral<P = impl GpioPin> + 'd, 101 ch3: impl Peripheral<P = impl GpioPin> + 'd,
95 config: Config, 102 config: Config,
96 ) -> Result<Self, Error> { 103 ) -> Result<Self, Error> {
97 into_degraded_ref!(ch0, ch1, ch2, ch3); 104 into_ref!(ch0, ch1, ch2, ch3);
98 Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), Some(ch3), config) 105 Self::new_inner(
106 pwm,
107 Some(ch0.map_into()),
108 Some(ch1.map_into()),
109 Some(ch2.map_into()),
110 Some(ch3.map_into()),
111 config,
112 )
99 } 113 }
100 114
101 fn new_inner( 115 fn new_inner(
@@ -561,8 +575,8 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
561 #[allow(unused_unsafe)] 575 #[allow(unused_unsafe)]
562 pub fn new_1ch(pwm: impl Peripheral<P = T> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd) -> Self { 576 pub fn new_1ch(pwm: impl Peripheral<P = T> + 'd, ch0: impl Peripheral<P = impl GpioPin> + 'd) -> Self {
563 unsafe { 577 unsafe {
564 into_degraded_ref!(ch0); 578 into_ref!(ch0);
565 Self::new_inner(pwm, Some(ch0), None, None, None) 579 Self::new_inner(pwm, Some(ch0.map_into()), None, None, None)
566 } 580 }
567 } 581 }
568 582
@@ -573,8 +587,8 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
573 ch0: impl Peripheral<P = impl GpioPin> + 'd, 587 ch0: impl Peripheral<P = impl GpioPin> + 'd,
574 ch1: impl Peripheral<P = impl GpioPin> + 'd, 588 ch1: impl Peripheral<P = impl GpioPin> + 'd,
575 ) -> Self { 589 ) -> Self {
576 into_degraded_ref!(ch0, ch1); 590 into_ref!(ch0, ch1);
577 Self::new_inner(pwm, Some(ch0), Some(ch1), None, None) 591 Self::new_inner(pwm, Some(ch0.map_into()), Some(ch1.map_into()), None, None)
578 } 592 }
579 593
580 /// Create a new 3-channel PWM 594 /// Create a new 3-channel PWM
@@ -586,8 +600,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
586 ch2: impl Peripheral<P = impl GpioPin> + 'd, 600 ch2: impl Peripheral<P = impl GpioPin> + 'd,
587 ) -> Self { 601 ) -> Self {
588 unsafe { 602 unsafe {
589 into_degraded_ref!(ch0, ch1, ch2); 603 into_ref!(ch0, ch1, ch2);
590 Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), None) 604 Self::new_inner(
605 pwm,
606 Some(ch0.map_into()),
607 Some(ch1.map_into()),
608 Some(ch2.map_into()),
609 None,
610 )
591 } 611 }
592 } 612 }
593 613
@@ -601,8 +621,14 @@ impl<'d, T: Instance> SimplePwm<'d, T> {
601 ch3: impl Peripheral<P = impl GpioPin> + 'd, 621 ch3: impl Peripheral<P = impl GpioPin> + 'd,
602 ) -> Self { 622 ) -> Self {
603 unsafe { 623 unsafe {
604 into_degraded_ref!(ch0, ch1, ch2, ch3); 624 into_ref!(ch0, ch1, ch2, ch3);
605 Self::new_inner(pwm, Some(ch0), Some(ch1), Some(ch2), Some(ch3)) 625 Self::new_inner(
626 pwm,
627 Some(ch0.map_into()),
628 Some(ch1.map_into()),
629 Some(ch2.map_into()),
630 Some(ch3.map_into()),
631 )
606 } 632 }
607 } 633 }
608 634
diff --git a/embassy-nrf/src/qdec.rs b/embassy-nrf/src/qdec.rs
index 2fb31fc2d..d5dc14466 100644
--- a/embassy-nrf/src/qdec.rs
+++ b/embassy-nrf/src/qdec.rs
@@ -49,8 +49,8 @@ impl<'d> Qdec<'d> {
49 b: impl Peripheral<P = impl GpioPin> + 'd, 49 b: impl Peripheral<P = impl GpioPin> + 'd,
50 config: Config, 50 config: Config,
51 ) -> Self { 51 ) -> Self {
52 into_degraded_ref!(a, b); 52 into_ref!(a, b);
53 Self::new_inner(qdec, irq, a, b, None, config) 53 Self::new_inner(qdec, irq, a.map_into(), b.map_into(), None, config)
54 } 54 }
55 55
56 pub fn new_with_led( 56 pub fn new_with_led(
@@ -61,8 +61,8 @@ impl<'d> Qdec<'d> {
61 led: impl Peripheral<P = impl GpioPin> + 'd, 61 led: impl Peripheral<P = impl GpioPin> + 'd,
62 config: Config, 62 config: Config,
63 ) -> Self { 63 ) -> Self {
64 into_degraded_ref!(a, b, led); 64 into_ref!(a, b, led);
65 Self::new_inner(qdec, irq, a, b, Some(led), config) 65 Self::new_inner(qdec, irq, a.map_into(), b.map_into(), Some(led.map_into()), config)
66 } 66 }
67 67
68 fn new_inner( 68 fn new_inner(
diff --git a/embassy-nrf/src/qspi.rs b/embassy-nrf/src/qspi.rs
index 51d9446a3..67634b5b7 100644
--- a/embassy-nrf/src/qspi.rs
+++ b/embassy-nrf/src/qspi.rs
@@ -7,7 +7,6 @@ use embassy_hal_common::drop::DropBomb;
7use embassy_hal_common::{into_ref, PeripheralRef}; 7use embassy_hal_common::{into_ref, PeripheralRef};
8use futures::future::poll_fn; 8use futures::future::poll_fn;
9 9
10use crate::gpio::sealed::Pin as _;
11use crate::gpio::{self, Pin as GpioPin}; 10use crate::gpio::{self, Pin as GpioPin};
12use crate::interrupt::{Interrupt, InterruptExt}; 11use crate::interrupt::{Interrupt, InterruptExt};
13pub use crate::pac::qspi::ifconfig0::{ 12pub use crate::pac::qspi::ifconfig0::{
@@ -82,12 +81,18 @@ impl<'d, T: Instance, const FLASH_SIZE: usize> Qspi<'d, T, FLASH_SIZE> {
82 81
83 let r = T::regs(); 82 let r = T::regs();
84 83
85 into_degraded_ref!(sck, csn, io0, io1, io2, io3); 84 sck.set_high();
86 85 csn.set_high();
87 for pin in [&sck, &csn, &io0, &io1, &io2, &io3] { 86 io0.set_high();
88 pin.set_high(); 87 io1.set_high();
89 pin.conf().write(|w| w.dir().output().drive().h0h1()); 88 io2.set_high();
90 } 89 io3.set_high();
90 sck.conf().write(|w| w.dir().output().drive().h0h1());
91 csn.conf().write(|w| w.dir().output().drive().h0h1());
92 io0.conf().write(|w| w.dir().output().drive().h0h1());
93 io1.conf().write(|w| w.dir().output().drive().h0h1());
94 io2.conf().write(|w| w.dir().output().drive().h0h1());
95 io3.conf().write(|w| w.dir().output().drive().h0h1());
91 96
92 r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) }); 97 r.psel.sck.write(|w| unsafe { w.bits(sck.psel_bits()) });
93 r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) }); 98 r.psel.csn.write(|w| unsafe { w.bits(csn.psel_bits()) });
diff --git a/embassy-nrf/src/spim.rs b/embassy-nrf/src/spim.rs
index 4bb0f445f..a6b0be076 100644
--- a/embassy-nrf/src/spim.rs
+++ b/embassy-nrf/src/spim.rs
@@ -60,8 +60,15 @@ impl<'d, T: Instance> Spim<'d, T> {
60 mosi: impl Peripheral<P = impl GpioPin> + 'd, 60 mosi: impl Peripheral<P = impl GpioPin> + 'd,
61 config: Config, 61 config: Config,
62 ) -> Self { 62 ) -> Self {
63 into_degraded_ref!(sck, miso, mosi); 63 into_ref!(sck, miso, mosi);
64 Self::new_inner(spim, irq, sck, Some(miso), Some(mosi), config) 64 Self::new_inner(
65 spim,
66 irq,
67 sck.map_into(),
68 Some(miso.map_into()),
69 Some(mosi.map_into()),
70 config,
71 )
65 } 72 }
66 73
67 pub fn new_txonly( 74 pub fn new_txonly(
@@ -71,8 +78,8 @@ impl<'d, T: Instance> Spim<'d, T> {
71 mosi: impl Peripheral<P = impl GpioPin> + 'd, 78 mosi: impl Peripheral<P = impl GpioPin> + 'd,
72 config: Config, 79 config: Config,
73 ) -> Self { 80 ) -> Self {
74 into_degraded_ref!(sck, mosi); 81 into_ref!(sck, mosi);
75 Self::new_inner(spim, irq, sck, None, Some(mosi), config) 82 Self::new_inner(spim, irq, sck.map_into(), None, Some(mosi.map_into()), config)
76 } 83 }
77 84
78 pub fn new_rxonly( 85 pub fn new_rxonly(
@@ -82,8 +89,8 @@ impl<'d, T: Instance> Spim<'d, T> {
82 miso: impl Peripheral<P = impl GpioPin> + 'd, 89 miso: impl Peripheral<P = impl GpioPin> + 'd,
83 config: Config, 90 config: Config,
84 ) -> Self { 91 ) -> Self {
85 into_degraded_ref!(sck, miso); 92 into_ref!(sck, miso);
86 Self::new_inner(spim, irq, sck, Some(miso), None, config) 93 Self::new_inner(spim, irq, sck.map_into(), Some(miso.map_into()), None, config)
87 } 94 }
88 95
89 fn new_inner( 96 fn new_inner(
diff --git a/embassy-nrf/src/uarte.rs b/embassy-nrf/src/uarte.rs
index a556d6b9c..e23525563 100644
--- a/embassy-nrf/src/uarte.rs
+++ b/embassy-nrf/src/uarte.rs
@@ -89,8 +89,8 @@ impl<'d, T: Instance> Uarte<'d, T> {
89 txd: impl Peripheral<P = impl GpioPin> + 'd, 89 txd: impl Peripheral<P = impl GpioPin> + 'd,
90 config: Config, 90 config: Config,
91 ) -> Self { 91 ) -> Self {
92 into_degraded_ref!(rxd, txd); 92 into_ref!(rxd, txd);
93 Self::new_inner(uarte, irq, rxd, txd, None, None, config) 93 Self::new_inner(uarte, irq, rxd.map_into(), txd.map_into(), None, None, config)
94 } 94 }
95 95
96 /// Create a new UARTE with hardware flow control (RTS/CTS) 96 /// Create a new UARTE with hardware flow control (RTS/CTS)
@@ -103,8 +103,16 @@ impl<'d, T: Instance> Uarte<'d, T> {
103 rts: impl Peripheral<P = impl GpioPin> + 'd, 103 rts: impl Peripheral<P = impl GpioPin> + 'd,
104 config: Config, 104 config: Config,
105 ) -> Self { 105 ) -> Self {
106 into_degraded_ref!(rxd, txd, cts, rts); 106 into_ref!(rxd, txd, cts, rts);
107 Self::new_inner(uarte, irq, rxd, txd, Some(cts), Some(rts), config) 107 Self::new_inner(
108 uarte,
109 irq,
110 rxd.map_into(),
111 txd.map_into(),
112 Some(cts.map_into()),
113 Some(rts.map_into()),
114 config,
115 )
108 } 116 }
109 117
110 fn new_inner( 118 fn new_inner(
@@ -242,8 +250,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
242 txd: impl Peripheral<P = impl GpioPin> + 'd, 250 txd: impl Peripheral<P = impl GpioPin> + 'd,
243 config: Config, 251 config: Config,
244 ) -> Self { 252 ) -> Self {
245 into_degraded_ref!(txd); 253 into_ref!(txd);
246 Self::new_inner(uarte, irq, txd, None, config) 254 Self::new_inner(uarte, irq, txd.map_into(), None, config)
247 } 255 }
248 256
249 /// Create a new tx-only UARTE with hardware flow control (RTS/CTS) 257 /// Create a new tx-only UARTE with hardware flow control (RTS/CTS)
@@ -254,8 +262,8 @@ impl<'d, T: Instance> UarteTx<'d, T> {
254 cts: impl Peripheral<P = impl GpioPin> + 'd, 262 cts: impl Peripheral<P = impl GpioPin> + 'd,
255 config: Config, 263 config: Config,
256 ) -> Self { 264 ) -> Self {
257 into_degraded_ref!(txd, cts); 265 into_ref!(txd, cts);
258 Self::new_inner(uarte, irq, txd, Some(cts), config) 266 Self::new_inner(uarte, irq, txd.map_into(), Some(cts.map_into()), config)
259 } 267 }
260 268
261 fn new_inner( 269 fn new_inner(
@@ -434,8 +442,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
434 rxd: impl Peripheral<P = impl GpioPin> + 'd, 442 rxd: impl Peripheral<P = impl GpioPin> + 'd,
435 config: Config, 443 config: Config,
436 ) -> Self { 444 ) -> Self {
437 into_degraded_ref!(rxd); 445 into_ref!(rxd);
438 Self::new_inner(uarte, irq, rxd, None, config) 446 Self::new_inner(uarte, irq, rxd.map_into(), None, config)
439 } 447 }
440 448
441 /// Create a new rx-only UARTE with hardware flow control (RTS/CTS) 449 /// Create a new rx-only UARTE with hardware flow control (RTS/CTS)
@@ -446,8 +454,8 @@ impl<'d, T: Instance> UarteRx<'d, T> {
446 rts: impl Peripheral<P = impl GpioPin> + 'd, 454 rts: impl Peripheral<P = impl GpioPin> + 'd,
447 config: Config, 455 config: Config,
448 ) -> Self { 456 ) -> Self {
449 into_degraded_ref!(rxd, rts); 457 into_ref!(rxd, rts);
450 Self::new_inner(uarte, irq, rxd, Some(rts), config) 458 Self::new_inner(uarte, irq, rxd.map_into(), Some(rts.map_into()), config)
451 } 459 }
452 460
453 fn new_inner( 461 fn new_inner(
@@ -677,8 +685,19 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
677 txd: impl Peripheral<P = impl GpioPin> + 'd, 685 txd: impl Peripheral<P = impl GpioPin> + 'd,
678 config: Config, 686 config: Config,
679 ) -> Self { 687 ) -> Self {
680 into_degraded_ref!(rxd, txd); 688 into_ref!(rxd, txd);
681 Self::new_inner(uarte, timer, ppi_ch1, ppi_ch2, irq, rxd, txd, None, None, config) 689 Self::new_inner(
690 uarte,
691 timer,
692 ppi_ch1,
693 ppi_ch2,
694 irq,
695 rxd.map_into(),
696 txd.map_into(),
697 None,
698 None,
699 config,
700 )
682 } 701 }
683 702
684 /// Create a new UARTE with hardware flow control (RTS/CTS) 703 /// Create a new UARTE with hardware flow control (RTS/CTS)
@@ -694,17 +713,17 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
694 rts: impl Peripheral<P = impl GpioPin> + 'd, 713 rts: impl Peripheral<P = impl GpioPin> + 'd,
695 config: Config, 714 config: Config,
696 ) -> Self { 715 ) -> Self {
697 into_degraded_ref!(rxd, txd, cts, rts); 716 into_ref!(rxd, txd, cts, rts);
698 Self::new_inner( 717 Self::new_inner(
699 uarte, 718 uarte,
700 timer, 719 timer,
701 ppi_ch1, 720 ppi_ch1,
702 ppi_ch2, 721 ppi_ch2,
703 irq, 722 irq,
704 rxd, 723 rxd.map_into(),
705 txd, 724 txd.map_into(),
706 Some(cts), 725 Some(cts.map_into()),
707 Some(rts), 726 Some(rts.map_into()),
708 config, 727 config,
709 ) 728 )
710 } 729 }
@@ -744,7 +763,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
744 timer.cc(0).short_compare_stop(); 763 timer.cc(0).short_compare_stop();
745 764
746 let mut ppi_ch1 = Ppi::new_one_to_two( 765 let mut ppi_ch1 = Ppi::new_one_to_two(
747 unsafe { ppi_ch1.into_inner() }.degrade(), 766 ppi_ch1.map_into(),
748 Event::from_reg(&r.events_rxdrdy), 767 Event::from_reg(&r.events_rxdrdy),
749 timer.task_clear(), 768 timer.task_clear(),
750 timer.task_start(), 769 timer.task_start(),
@@ -752,7 +771,7 @@ impl<'d, U: Instance, T: TimerInstance> UarteWithIdle<'d, U, T> {
752 ppi_ch1.enable(); 771 ppi_ch1.enable();
753 772
754 let mut ppi_ch2 = Ppi::new_one_to_one( 773 let mut ppi_ch2 = Ppi::new_one_to_one(
755 unsafe { ppi_ch2.into_inner() }.degrade(), 774 ppi_ch2.map_into(),
756 timer.cc(0).event_compare(), 775 timer.cc(0).event_compare(),
757 Task::from_reg(&r.tasks_stoprx), 776 Task::from_reg(&r.tasks_stoprx),
758 ); 777 );
diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index 3588c2f7e..5db1a690b 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -647,7 +647,7 @@ pub(crate) mod sealed {
647 } 647 }
648} 648}
649 649
650pub trait Pin: Peripheral<P = Self> + sealed::Pin { 650pub trait Pin: Peripheral<P = Self> + Into<AnyPin> + sealed::Pin + Sized + 'static {
651 /// Degrade to a generic pin struct 651 /// Degrade to a generic pin struct
652 fn degrade(self) -> AnyPin { 652 fn degrade(self) -> AnyPin {
653 AnyPin { 653 AnyPin {
@@ -660,22 +660,6 @@ pub struct AnyPin {
660 pin_bank: u8, 660 pin_bank: u8,
661} 661}
662 662
663impl AnyPin {
664 pub(crate) fn into_degraded_ref<'a>(pin: impl Peripheral<P = impl Pin + 'a> + 'a) -> PeripheralRef<'a, Self> {
665 PeripheralRef::new(AnyPin {
666 pin_bank: pin.into_ref().pin_bank(),
667 })
668 }
669}
670
671macro_rules! into_degraded_ref {
672 ($($name:ident),*) => {
673 $(
674 let $name = $crate::gpio::AnyPin::into_degraded_ref($name);
675 )*
676 };
677}
678
679impl_peripheral!(AnyPin); 663impl_peripheral!(AnyPin);
680 664
681impl Pin for AnyPin {} 665impl Pin for AnyPin {}
@@ -695,6 +679,12 @@ macro_rules! impl_pin {
695 ($bank as u8) * 32 + $pin_num 679 ($bank as u8) * 32 + $pin_num
696 } 680 }
697 } 681 }
682
683 impl From<peripherals::$name> for crate::gpio::AnyPin {
684 fn from(val: peripherals::$name) -> Self {
685 crate::gpio::Pin::degrade(val)
686 }
687 }
698 }; 688 };
699} 689}
700 690
diff --git a/embassy-rp/src/spi.rs b/embassy-rp/src/spi.rs
index a984d16a8..d0261598e 100644
--- a/embassy-rp/src/spi.rs
+++ b/embassy-rp/src/spi.rs
@@ -65,8 +65,15 @@ impl<'d, T: Instance> Spi<'d, T> {
65 miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, 65 miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
66 config: Config, 66 config: Config,
67 ) -> Self { 67 ) -> Self {
68 into_degraded_ref!(clk, mosi, miso); 68 into_ref!(clk, mosi, miso);
69 Self::new_inner(inner, Some(clk), Some(mosi), Some(miso), None, config) 69 Self::new_inner(
70 inner,
71 Some(clk.map_into()),
72 Some(mosi.map_into()),
73 Some(miso.map_into()),
74 None,
75 config,
76 )
70 } 77 }
71 78
72 pub fn new_txonly( 79 pub fn new_txonly(
@@ -75,8 +82,8 @@ impl<'d, T: Instance> Spi<'d, T> {
75 mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, 82 mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd,
76 config: Config, 83 config: Config,
77 ) -> Self { 84 ) -> Self {
78 into_degraded_ref!(clk, mosi); 85 into_ref!(clk, mosi);
79 Self::new_inner(inner, Some(clk), Some(mosi), None, None, config) 86 Self::new_inner(inner, Some(clk.map_into()), Some(mosi.map_into()), None, None, config)
80 } 87 }
81 88
82 pub fn new_rxonly( 89 pub fn new_rxonly(
@@ -85,8 +92,8 @@ impl<'d, T: Instance> Spi<'d, T> {
85 miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, 92 miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd,
86 config: Config, 93 config: Config,
87 ) -> Self { 94 ) -> Self {
88 into_degraded_ref!(clk, miso); 95 into_ref!(clk, miso);
89 Self::new_inner(inner, Some(clk), None, Some(miso), None, config) 96 Self::new_inner(inner, Some(clk.map_into()), None, Some(miso.map_into()), None, config)
90 } 97 }
91 98
92 fn new_inner( 99 fn new_inner(