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-rw-r--r--embassy-stm32/Cargo.toml4
-rw-r--r--embassy-stm32/src/rcc/g4.rs2
-rw-r--r--embassy-stm32/src/rcc/l4l5.rs4
-rw-r--r--embassy-stm32/src/rcc/u5.rs2
-rw-r--r--embassy-stm32/src/rcc/wb.rs10
-rw-r--r--embassy-stm32/src/rng.rs2
-rw-r--r--tests/stm32/Cargo.toml42
-rw-r--r--tests/stm32/src/bin/rng.rs50
8 files changed, 93 insertions, 23 deletions
diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 1eff10707..a380fb21f 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -58,7 +58,7 @@ rand_core = "0.6.3"
58sdio-host = "0.5.0" 58sdio-host = "0.5.0"
59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true } 59embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
60critical-section = "1.1" 60critical-section = "1.1"
61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5ecc410f93477d3d9314723ec26e637aa0c63b8f" } 61stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9330e31117668350a62572fdcd2598ec17d08042" }
62vcell = "0.1.3" 62vcell = "0.1.3"
63bxcan = "0.7.0" 63bxcan = "0.7.0"
64nb = "1.0.0" 64nb = "1.0.0"
@@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
76[build-dependencies] 76[build-dependencies]
77proc-macro2 = "1.0.36" 77proc-macro2 = "1.0.36"
78quote = "1.0.15" 78quote = "1.0.15"
79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5ecc410f93477d3d9314723ec26e637aa0c63b8f", default-features = false, features = ["metadata"]} 79stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9330e31117668350a62572fdcd2598ec17d08042", default-features = false, features = ["metadata"]}
80 80
81 81
82[features] 82[features]
diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs
index 32d14d2fe..ba2a5e19c 100644
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@@ -118,7 +118,7 @@ impl Default for Config {
118 apb2_pre: APBPrescaler::DIV1, 118 apb2_pre: APBPrescaler::DIV1,
119 low_power_run: false, 119 low_power_run: false,
120 pll: None, 120 pll: None,
121 clock_48mhz_src: None, 121 clock_48mhz_src: Some(Clock48MhzSrc::Hsi48(None)),
122 adc12_clock_source: Adcsel::DISABLE, 122 adc12_clock_source: Adcsel::DISABLE,
123 adc345_clock_source: Adcsel::DISABLE, 123 adc345_clock_source: Adcsel::DISABLE,
124 ls: Default::default(), 124 ls: Default::default(),
diff --git a/embassy-stm32/src/rcc/l4l5.rs b/embassy-stm32/src/rcc/l4l5.rs
index 1a8974ff6..90c8923c1 100644
--- a/embassy-stm32/src/rcc/l4l5.rs
+++ b/embassy-stm32/src/rcc/l4l5.rs
@@ -192,6 +192,10 @@ pub(crate) unsafe fn init(config: Config) {
192 ClockSrc::PLL => pll._r.unwrap(), 192 ClockSrc::PLL => pll._r.unwrap(),
193 }; 193 };
194 194
195 #[cfg(stm32l4)]
196 RCC.ccipr().modify(|w| w.set_clk48sel(config.clk48_src));
197 #[cfg(stm32l5)]
198 RCC.ccipr1().modify(|w| w.set_clk48sel(config.clk48_src));
195 let _clk48 = match config.clk48_src { 199 let _clk48 = match config.clk48_src {
196 Clk48Src::HSI48 => hsi48, 200 Clk48Src::HSI48 => hsi48,
197 Clk48Src::MSI => msi, 201 Clk48Src::MSI => msi,
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index fb9c163ee..aba5ca831 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -188,7 +188,7 @@ impl Default for Config {
188 apb1_pre: APBPrescaler::DIV1, 188 apb1_pre: APBPrescaler::DIV1,
189 apb2_pre: APBPrescaler::DIV1, 189 apb2_pre: APBPrescaler::DIV1,
190 apb3_pre: APBPrescaler::DIV1, 190 apb3_pre: APBPrescaler::DIV1,
191 hsi48: false, 191 hsi48: true,
192 voltage_range: VoltageScale::RANGE3, 192 voltage_range: VoltageScale::RANGE3,
193 ls: Default::default(), 193 ls: Default::default(),
194 } 194 }
diff --git a/embassy-stm32/src/rcc/wb.rs b/embassy-stm32/src/rcc/wb.rs
index a6cf118a8..64173fea8 100644
--- a/embassy-stm32/src/rcc/wb.rs
+++ b/embassy-stm32/src/rcc/wb.rs
@@ -40,6 +40,7 @@ pub struct Config {
40 pub hse: Option<Hse>, 40 pub hse: Option<Hse>,
41 pub sys: Sysclk, 41 pub sys: Sysclk,
42 pub mux: Option<PllMux>, 42 pub mux: Option<PllMux>,
43 pub hsi48: bool,
43 44
44 pub pll: Option<Pll>, 45 pub pll: Option<Pll>,
45 pub pllsai: Option<Pll>, 46 pub pllsai: Option<Pll>,
@@ -63,6 +64,7 @@ pub const WPAN_DEFAULT: Config = Config {
63 source: PllSource::HSE, 64 source: PllSource::HSE,
64 prediv: Pllm::DIV2, 65 prediv: Pllm::DIV2,
65 }), 66 }),
67 hsi48: true,
66 68
67 ls: super::LsConfig::default_lse(), 69 ls: super::LsConfig::default_lse(),
68 70
@@ -90,6 +92,7 @@ impl Default for Config {
90 mux: None, 92 mux: None,
91 pll: None, 93 pll: None,
92 pllsai: None, 94 pllsai: None,
95 hsi48: true,
93 96
94 ls: Default::default(), 97 ls: Default::default(),
95 98
@@ -222,6 +225,13 @@ pub(crate) unsafe fn init(config: Config) {
222 _ => {} 225 _ => {}
223 } 226 }
224 227
228 let _hsi48 = config.hsi48.then(|| {
229 rcc.crrcr().modify(|w| w.set_hsi48on(true));
230 while !rcc.crrcr().read().hsi48rdy() {}
231
232 Hertz(48_000_000)
233 });
234
225 rcc.cfgr().modify(|w| { 235 rcc.cfgr().modify(|w| {
226 w.set_sw(config.sys.into()); 236 w.set_sw(config.sys.into());
227 w.set_hpre(config.ahb1_pre); 237 w.set_hpre(config.ahb1_pre);
diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs
index fc003ebe6..5e6922e9b 100644
--- a/embassy-stm32/src/rng.rs
+++ b/embassy-stm32/src/rng.rs
@@ -85,7 +85,7 @@ impl<'d, T: Instance> Rng<'d, T> {
85 reg.set_ie(false); 85 reg.set_ie(false);
86 reg.set_rngen(true); 86 reg.set_rngen(true);
87 }); 87 });
88 T::regs().cr().write(|reg| { 88 T::regs().cr().modify(|reg| {
89 reg.set_ced(false); 89 reg.set_ced(false);
90 }); 90 });
91 // wait for CONDRST to be set 91 // wait for CONDRST to be set
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index fd18cd77c..9adff596d 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -6,26 +6,27 @@ license = "MIT OR Apache-2.0"
6autobins = false 6autobins = false
7 7
8[features] 8[features]
9stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] # Blue Pill 9stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"]
10stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin"] # Nucleo "sdmmc" 10stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin", "rng"]
11stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma", "dac-adc-pin"] # Nucleo 11stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma", "dac-adc-pin"]
12stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] # Nucleo 12stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"]
13stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "not-gpdma"] # Nucleo 13stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "not-gpdma", "rng"]
14stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin"] # Nucleo 14stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin", "rng"]
15stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" ] # Nucleo 15stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"]
16stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth"] # Nucleo 16stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"]
17stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono"] # IoT board 17stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"]
18stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma"] # Nucleo 18stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma", "rng"]
19stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] # Nucleo 19stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"]
20stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma"] # Nucleo 20stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"]
21stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma"] # Nucleo 21stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"]
22stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma"] # Nucleo 22stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng"]
23stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth"] # Nucleo 23stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"]
24stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth"] # Nucleo 24stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"]
25stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] # Nucleo 25stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]
26stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma"] # Nucleo 26stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"]
27 27
28eth = [] 28eth = []
29rng = []
29sdmmc = [] 30sdmmc = []
30stop = ["embassy-stm32/low-power"] 31stop = ["embassy-stm32/low-power"]
31chrono = ["embassy-stm32/chrono", "dep:chrono"] 32chrono = ["embassy-stm32/chrono", "dep:chrono"]
@@ -87,6 +88,11 @@ path = "src/bin/gpio.rs"
87required-features = [] 88required-features = []
88 89
89[[bin]] 90[[bin]]
91name = "rng"
92path = "src/bin/rng.rs"
93required-features = [ "rng",]
94
95[[bin]]
90name = "rtc" 96name = "rtc"
91path = "src/bin/rtc.rs" 97path = "src/bin/rtc.rs"
92required-features = [ "chrono",] 98required-features = [ "chrono",]
diff --git a/tests/stm32/src/bin/rng.rs b/tests/stm32/src/bin/rng.rs
new file mode 100644
index 000000000..65da737d0
--- /dev/null
+++ b/tests/stm32/src/bin/rng.rs
@@ -0,0 +1,50 @@
1// required-features: rng
2#![no_std]
3#![no_main]
4#![feature(type_alias_impl_trait)]
5
6#[path = "../common.rs"]
7mod common;
8use common::*;
9use embassy_executor::Spawner;
10use embassy_stm32::rng::Rng;
11use embassy_stm32::{bind_interrupts, peripherals, rng};
12use {defmt_rtt as _, panic_probe as _};
13
14#[cfg(any(feature = "stm32l4a6zg", feature = "stm32h755zi", feature = "stm32f429zi"))]
15bind_interrupts!(struct Irqs {
16 HASH_RNG => rng::InterruptHandler<peripherals::RNG>;
17});
18#[cfg(any(feature = "stm32l073rz"))]
19bind_interrupts!(struct Irqs {
20 RNG_LPUART1 => rng::InterruptHandler<peripherals::RNG>;
21});
22#[cfg(not(any(
23 feature = "stm32l4a6zg",
24 feature = "stm32l073rz",
25 feature = "stm32h755zi",
26 feature = "stm32f429zi"
27)))]
28bind_interrupts!(struct Irqs {
29 RNG => rng::InterruptHandler<peripherals::RNG>;
30});
31
32#[embassy_executor::main]
33async fn main(_spawner: Spawner) {
34 let p: embassy_stm32::Peripherals = embassy_stm32::init(config());
35
36 let mut rng = Rng::new(p.RNG, Irqs);
37
38 let mut buf1 = [0u8; 16];
39 unwrap!(rng.async_fill_bytes(&mut buf1).await);
40 info!("random bytes: {:02x}", buf1);
41
42 let mut buf2 = [0u8; 16];
43 unwrap!(rng.async_fill_bytes(&mut buf2).await);
44 info!("random bytes: {:02x}", buf2);
45
46 defmt::assert!(buf1 != buf2);
47
48 info!("Test OK");
49 cortex_m::asm::bkpt();
50}