diff options
| -rw-r--r-- | embassy-stm32/src/dma/dma.rs | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/embassy-stm32/src/dma/dma.rs b/embassy-stm32/src/dma/dma.rs index 385a833f7..59937f4b0 100644 --- a/embassy-stm32/src/dma/dma.rs +++ b/embassy-stm32/src/dma/dma.rs | |||
| @@ -432,12 +432,8 @@ mod low_level_api { | |||
| 432 | } | 432 | } |
| 433 | 433 | ||
| 434 | if isr.tcif(channel_num % 4) && cr.read().tcie() { | 434 | if isr.tcif(channel_num % 4) && cr.read().tcie() { |
| 435 | if cr.read().dbm() == vals::Dbm::DISABLED { | 435 | /* acknowledge transfer complete interrupt */ |
| 436 | cr.write(|_| ()); // Disable channel with the default value. | 436 | dma.ifcr(channel_num / 4).write(|w| w.set_tcif(channel_num % 4, true)); |
| 437 | } else { | ||
| 438 | // for double buffered mode, clear TCIF flag but do not stop the transfer | ||
| 439 | dma.ifcr(channel_num / 4).write(|w| w.set_tcif(channel_num % 4, true)); | ||
| 440 | } | ||
| 441 | STATE.channels[state_index].waker.wake(); | 437 | STATE.channels[state_index].waker.wake(); |
| 442 | } | 438 | } |
| 443 | } | 439 | } |
