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-rw-r--r--embassy-stm32/src/usb_otg/usb.rs24
1 files changed, 24 insertions, 0 deletions
diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs
index c7f19f6e9..e602bcb70 100644
--- a/embassy-stm32/src/usb_otg/usb.rs
+++ b/embassy-stm32/src/usb_otg/usb.rs
@@ -828,6 +828,30 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> {
828 critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true))); 828 critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true)));
829 } 829 }
830 830
831 #[cfg(stm32f7)]
832 {
833 // Enable ULPI clock if external PHY is used
834 let ulpien = !self.phy_type.internal();
835 critical_section::with(|_| {
836 crate::pac::RCC.ahb1enr().modify(|w| {
837 if T::HIGH_SPEED {
838 w.set_usb_otg_hsulpien(ulpien);
839 } else {
840 w.set_usb_otg_hsen(ulpien);
841 }
842 });
843
844 // Low power mode
845 crate::pac::RCC.ahb1lpenr().modify(|w| {
846 if T::HIGH_SPEED {
847 w.set_usb_otg_hsulpilpen(ulpien);
848 } else {
849 w.set_usb_otg_hslpen(ulpien);
850 }
851 });
852 });
853 }
854
831 #[cfg(stm32h7)] 855 #[cfg(stm32h7)]
832 { 856 {
833 // If true, VDD33USB is generated by internal regulator from VDD50USB 857 // If true, VDD33USB is generated by internal regulator from VDD50USB