diff options
Diffstat (limited to 'embassy-embedded-hal/src/shared_bus/blocking/spi.rs')
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index c08bcbf62..d54ca6bfa 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs | |||
| @@ -8,6 +8,7 @@ use embedded_hal_1::spi; | |||
| 8 | use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice}; | 8 | use embedded_hal_1::spi::blocking::{SpiBusFlush, SpiDevice}; |
| 9 | 9 | ||
| 10 | use crate::shared_bus::spi::SpiBusDeviceError; | 10 | use crate::shared_bus::spi::SpiBusDeviceError; |
| 11 | use crate::SetConfig; | ||
| 11 | 12 | ||
| 12 | pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { | 13 | pub struct SpiBusDevice<'a, M: RawMutex, BUS, CS> { |
| 13 | bus: &'a Mutex<M, RefCell<BUS>>, | 14 | bus: &'a Mutex<M, RefCell<BUS>>, |
| @@ -55,3 +56,52 @@ where | |||
| 55 | }) | 56 | }) |
| 56 | } | 57 | } |
| 57 | } | 58 | } |
| 59 | |||
| 60 | pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS, CS, C> { | ||
| 61 | bus: &'a Mutex<M, RefCell<BUS>>, | ||
| 62 | cs: CS, | ||
| 63 | config: C, | ||
| 64 | } | ||
| 65 | |||
| 66 | impl<'a, M: RawMutex, BUS, CS, C> SpiBusDeviceWithConfig<'a, M, BUS, CS, C> { | ||
| 67 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: C) -> Self { | ||
| 68 | Self { bus, cs, config } | ||
| 69 | } | ||
| 70 | } | ||
| 71 | |||
| 72 | impl<'a, M: RawMutex, BUS, CS, C> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS, C> | ||
| 73 | where | ||
| 74 | BUS: spi::ErrorType, | ||
| 75 | CS: OutputPin, | ||
| 76 | { | ||
| 77 | type Error = SpiBusDeviceError<BUS::Error, CS::Error>; | ||
| 78 | } | ||
| 79 | |||
| 80 | impl<BUS, M, CS, C> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS, C> | ||
| 81 | where | ||
| 82 | M: RawMutex, | ||
| 83 | BUS: SpiBusFlush + SetConfig<C>, | ||
| 84 | CS: OutputPin, | ||
| 85 | { | ||
| 86 | type Bus = BUS; | ||
| 87 | |||
| 88 | fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { | ||
| 89 | self.bus.lock(|bus| { | ||
| 90 | let mut bus = bus.borrow_mut(); | ||
| 91 | bus.set_config(&self.config); | ||
| 92 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; | ||
| 93 | |||
| 94 | let f_res = f(&mut bus); | ||
| 95 | |||
| 96 | // On failure, it's important to still flush and deassert CS. | ||
| 97 | let flush_res = bus.flush(); | ||
| 98 | let cs_res = self.cs.set_high(); | ||
| 99 | |||
| 100 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; | ||
| 101 | flush_res.map_err(SpiBusDeviceError::Spi)?; | ||
| 102 | cs_res.map_err(SpiBusDeviceError::Cs)?; | ||
| 103 | |||
| 104 | Ok(f_res) | ||
| 105 | }) | ||
| 106 | } | ||
| 107 | } | ||
