diff options
Diffstat (limited to 'embassy-embedded-hal/src')
| -rw-r--r-- | embassy-embedded-hal/src/lib.rs | 5 | ||||
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/blocking/i2c.rs | 101 | ||||
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/blocking/spi.rs | 89 | ||||
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/i2c.rs | 16 | ||||
| -rw-r--r-- | embassy-embedded-hal/src/shared_bus/spi.rs | 17 |
5 files changed, 117 insertions, 111 deletions
diff --git a/embassy-embedded-hal/src/lib.rs b/embassy-embedded-hal/src/lib.rs index aae719925..688d0b48d 100644 --- a/embassy-embedded-hal/src/lib.rs +++ b/embassy-embedded-hal/src/lib.rs | |||
| @@ -5,6 +5,7 @@ | |||
| 5 | pub mod adapter; | 5 | pub mod adapter; |
| 6 | pub mod shared_bus; | 6 | pub mod shared_bus; |
| 7 | 7 | ||
| 8 | pub trait SetConfig<C> { | 8 | pub trait SetConfig { |
| 9 | fn set_config(&mut self, config: &C); | 9 | type Config; |
| 10 | fn set_config(&mut self, config: &Self::Config); | ||
| 10 | } | 11 | } |
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs index e8dd0f248..0c8338c73 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/i2c.rs | |||
| @@ -101,28 +101,71 @@ where | |||
| 101 | } | 101 | } |
| 102 | } | 102 | } |
| 103 | 103 | ||
| 104 | pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS, C> { | 104 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cBusDevice<'_, M, BUS> |
| 105 | where | ||
| 106 | M: RawMutex, | ||
| 107 | BUS: embedded_hal_02::blocking::i2c::Write<Error = E>, | ||
| 108 | { | ||
| 109 | type Error = I2cBusDeviceError<E>; | ||
| 110 | |||
| 111 | fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> { | ||
| 112 | self.bus | ||
| 113 | .lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cBusDeviceError::I2c)) | ||
| 114 | } | ||
| 115 | } | ||
| 116 | |||
| 117 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cBusDevice<'_, M, BUS> | ||
| 118 | where | ||
| 119 | M: RawMutex, | ||
| 120 | BUS: embedded_hal_02::blocking::i2c::Read<Error = E>, | ||
| 121 | { | ||
| 122 | type Error = I2cBusDeviceError<E>; | ||
| 123 | |||
| 124 | fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> { | ||
| 125 | self.bus | ||
| 126 | .lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cBusDeviceError::I2c)) | ||
| 127 | } | ||
| 128 | } | ||
| 129 | |||
| 130 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cBusDevice<'_, M, BUS> | ||
| 131 | where | ||
| 132 | M: RawMutex, | ||
| 133 | BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>, | ||
| 134 | { | ||
| 135 | type Error = I2cBusDeviceError<E>; | ||
| 136 | |||
| 137 | fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> { | ||
| 138 | self.bus.lock(|bus| { | ||
| 139 | bus.borrow_mut() | ||
| 140 | .write_read(addr, bytes, buffer) | ||
| 141 | .map_err(I2cBusDeviceError::I2c) | ||
| 142 | }) | ||
| 143 | } | ||
| 144 | } | ||
| 145 | |||
| 146 | pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> { | ||
| 105 | bus: &'a Mutex<M, RefCell<BUS>>, | 147 | bus: &'a Mutex<M, RefCell<BUS>>, |
| 106 | config: C, | 148 | config: BUS::Config, |
| 107 | } | 149 | } |
| 108 | 150 | ||
| 109 | impl<'a, M: RawMutex, BUS, C> I2cBusDeviceWithConfig<'a, M, BUS, C> { | 151 | impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> { |
| 110 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: C) -> Self { | 152 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, config: BUS::Config) -> Self { |
| 111 | Self { bus, config } | 153 | Self { bus, config } |
| 112 | } | 154 | } |
| 113 | } | 155 | } |
| 114 | 156 | ||
| 115 | impl<'a, M: RawMutex, BUS, C> ErrorType for I2cBusDeviceWithConfig<'a, M, BUS, C> | 157 | impl<'a, M, BUS> ErrorType for I2cBusDeviceWithConfig<'a, M, BUS> |
| 116 | where | 158 | where |
| 117 | BUS: ErrorType, | 159 | M: RawMutex, |
| 160 | BUS: ErrorType + SetConfig, | ||
| 118 | { | 161 | { |
| 119 | type Error = I2cBusDeviceError<BUS::Error>; | 162 | type Error = I2cBusDeviceError<BUS::Error>; |
| 120 | } | 163 | } |
| 121 | 164 | ||
| 122 | impl<M, BUS, C> I2c for I2cBusDeviceWithConfig<'_, M, BUS, C> | 165 | impl<M, BUS> I2c for I2cBusDeviceWithConfig<'_, M, BUS> |
| 123 | where | 166 | where |
| 124 | M: RawMutex, | 167 | M: RawMutex, |
| 125 | BUS: I2c + SetConfig<C>, | 168 | BUS: I2c + SetConfig, |
| 126 | { | 169 | { |
| 127 | fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { | 170 | fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { |
| 128 | self.bus.lock(|bus| { | 171 | self.bus.lock(|bus| { |
| @@ -183,45 +226,3 @@ where | |||
| 183 | todo!() | 226 | todo!() |
| 184 | } | 227 | } |
| 185 | } | 228 | } |
| 186 | |||
| 187 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Write for I2cBusDevice<'_, M, BUS> | ||
| 188 | where | ||
| 189 | M: RawMutex, | ||
| 190 | BUS: embedded_hal_02::blocking::i2c::Write<Error = E>, | ||
| 191 | { | ||
| 192 | type Error = I2cBusDeviceError<E>; | ||
| 193 | |||
| 194 | fn write<'w>(&mut self, addr: u8, bytes: &'w [u8]) -> Result<(), Self::Error> { | ||
| 195 | self.bus | ||
| 196 | .lock(|bus| bus.borrow_mut().write(addr, bytes).map_err(I2cBusDeviceError::I2c)) | ||
| 197 | } | ||
| 198 | } | ||
| 199 | |||
| 200 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::Read for I2cBusDevice<'_, M, BUS> | ||
| 201 | where | ||
| 202 | M: RawMutex, | ||
| 203 | BUS: embedded_hal_02::blocking::i2c::Read<Error = E>, | ||
| 204 | { | ||
| 205 | type Error = I2cBusDeviceError<E>; | ||
| 206 | |||
| 207 | fn read<'w>(&mut self, addr: u8, bytes: &'w mut [u8]) -> Result<(), Self::Error> { | ||
| 208 | self.bus | ||
| 209 | .lock(|bus| bus.borrow_mut().read(addr, bytes).map_err(I2cBusDeviceError::I2c)) | ||
| 210 | } | ||
| 211 | } | ||
| 212 | |||
| 213 | impl<'a, M, BUS, E> embedded_hal_02::blocking::i2c::WriteRead for I2cBusDevice<'_, M, BUS> | ||
| 214 | where | ||
| 215 | M: RawMutex, | ||
| 216 | BUS: embedded_hal_02::blocking::i2c::WriteRead<Error = E>, | ||
| 217 | { | ||
| 218 | type Error = I2cBusDeviceError<E>; | ||
| 219 | |||
| 220 | fn write_read<'w>(&mut self, addr: u8, bytes: &'w [u8], buffer: &'w mut [u8]) -> Result<(), Self::Error> { | ||
| 221 | self.bus.lock(|bus| { | ||
| 222 | bus.borrow_mut() | ||
| 223 | .write_read(addr, bytes, buffer) | ||
| 224 | .map_err(I2cBusDeviceError::I2c) | ||
| 225 | }) | ||
| 226 | } | ||
| 227 | } | ||
diff --git a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs index 2bcf47cff..456da8859 100644 --- a/embassy-embedded-hal/src/shared_bus/blocking/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/blocking/spi.rs | |||
| @@ -76,66 +76,39 @@ where | |||
| 76 | } | 76 | } |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS, CS, C> { | 79 | impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS> |
| 80 | bus: &'a Mutex<M, RefCell<BUS>>, | ||
| 81 | cs: CS, | ||
| 82 | config: C, | ||
| 83 | } | ||
| 84 | |||
| 85 | impl<'a, M: RawMutex, BUS, CS, C> SpiBusDeviceWithConfig<'a, M, BUS, CS, C> { | ||
| 86 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: C) -> Self { | ||
| 87 | Self { bus, cs, config } | ||
| 88 | } | ||
| 89 | } | ||
| 90 | |||
| 91 | impl<'a, M: RawMutex, BUS, CS, C> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS, C> | ||
| 92 | where | ||
| 93 | BUS: spi::ErrorType, | ||
| 94 | CS: OutputPin, | ||
| 95 | { | ||
| 96 | type Error = SpiBusDeviceError<BUS::Error, CS::Error>; | ||
| 97 | } | ||
| 98 | |||
| 99 | impl<BUS, M, CS, C> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS, C> | ||
| 100 | where | 80 | where |
| 101 | M: RawMutex, | 81 | M: RawMutex, |
| 102 | BUS: SpiBusFlush + SetConfig<C>, | 82 | BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>, |
| 103 | CS: OutputPin, | 83 | CS: OutputPin<Error = CsErr>, |
| 104 | { | 84 | { |
| 105 | type Bus = BUS; | 85 | type Error = SpiBusDeviceError<BusErr, CsErr>; |
| 106 | 86 | fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { | |
| 107 | fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { | ||
| 108 | self.bus.lock(|bus| { | 87 | self.bus.lock(|bus| { |
| 109 | let mut bus = bus.borrow_mut(); | 88 | let mut bus = bus.borrow_mut(); |
| 110 | bus.set_config(&self.config); | ||
| 111 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; | 89 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; |
| 112 | 90 | let f_res = bus.transfer(words); | |
| 113 | let f_res = f(&mut bus); | ||
| 114 | |||
| 115 | // On failure, it's important to still flush and deassert CS. | ||
| 116 | let flush_res = bus.flush(); | ||
| 117 | let cs_res = self.cs.set_high(); | 91 | let cs_res = self.cs.set_high(); |
| 118 | |||
| 119 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; | 92 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; |
| 120 | flush_res.map_err(SpiBusDeviceError::Spi)?; | ||
| 121 | cs_res.map_err(SpiBusDeviceError::Cs)?; | 93 | cs_res.map_err(SpiBusDeviceError::Cs)?; |
| 122 | Ok(f_res) | 94 | Ok(f_res) |
| 123 | }) | 95 | }) |
| 124 | } | 96 | } |
| 125 | } | 97 | } |
| 126 | 98 | ||
| 127 | impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Transfer<u8> for SpiBusDevice<'_, M, BUS, CS> | 99 | impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS> |
| 128 | where | 100 | where |
| 129 | M: RawMutex, | 101 | M: RawMutex, |
| 130 | BUS: embedded_hal_02::blocking::spi::Transfer<u8, Error = BusErr>, | 102 | BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>, |
| 131 | CS: OutputPin<Error = CsErr>, | 103 | CS: OutputPin<Error = CsErr>, |
| 132 | { | 104 | { |
| 133 | type Error = SpiBusDeviceError<BusErr, CsErr>; | 105 | type Error = SpiBusDeviceError<BusErr, CsErr>; |
| 134 | fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> { | 106 | |
| 107 | fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { | ||
| 135 | self.bus.lock(|bus| { | 108 | self.bus.lock(|bus| { |
| 136 | let mut bus = bus.borrow_mut(); | 109 | let mut bus = bus.borrow_mut(); |
| 137 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; | 110 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; |
| 138 | let f_res = bus.transfer(words); | 111 | let f_res = bus.write(words); |
| 139 | let cs_res = self.cs.set_high(); | 112 | let cs_res = self.cs.set_high(); |
| 140 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; | 113 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; |
| 141 | cs_res.map_err(SpiBusDeviceError::Cs)?; | 114 | cs_res.map_err(SpiBusDeviceError::Cs)?; |
| @@ -144,21 +117,49 @@ where | |||
| 144 | } | 117 | } |
| 145 | } | 118 | } |
| 146 | 119 | ||
| 147 | impl<'d, M, BUS, CS, BusErr, CsErr> embedded_hal_02::blocking::spi::Write<u8> for SpiBusDevice<'_, M, BUS, CS> | 120 | pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { |
| 121 | bus: &'a Mutex<M, RefCell<BUS>>, | ||
| 122 | cs: CS, | ||
| 123 | config: BUS::Config, | ||
| 124 | } | ||
| 125 | |||
| 126 | impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { | ||
| 127 | pub fn new(bus: &'a Mutex<M, RefCell<BUS>>, cs: CS, config: BUS::Config) -> Self { | ||
| 128 | Self { bus, cs, config } | ||
| 129 | } | ||
| 130 | } | ||
| 131 | |||
| 132 | impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> | ||
| 148 | where | 133 | where |
| 149 | M: RawMutex, | 134 | M: RawMutex, |
| 150 | BUS: embedded_hal_02::blocking::spi::Write<u8, Error = BusErr>, | 135 | BUS: spi::ErrorType + SetConfig, |
| 151 | CS: OutputPin<Error = CsErr>, | 136 | CS: OutputPin, |
| 152 | { | 137 | { |
| 153 | type Error = SpiBusDeviceError<BusErr, CsErr>; | 138 | type Error = SpiBusDeviceError<BUS::Error, CS::Error>; |
| 139 | } | ||
| 154 | 140 | ||
| 155 | fn write(&mut self, words: &[u8]) -> Result<(), Self::Error> { | 141 | impl<BUS, M, CS> SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> |
| 142 | where | ||
| 143 | M: RawMutex, | ||
| 144 | BUS: SpiBusFlush + SetConfig, | ||
| 145 | CS: OutputPin, | ||
| 146 | { | ||
| 147 | type Bus = BUS; | ||
| 148 | |||
| 149 | fn transaction<R>(&mut self, f: impl FnOnce(&mut Self::Bus) -> Result<R, BUS::Error>) -> Result<R, Self::Error> { | ||
| 156 | self.bus.lock(|bus| { | 150 | self.bus.lock(|bus| { |
| 157 | let mut bus = bus.borrow_mut(); | 151 | let mut bus = bus.borrow_mut(); |
| 152 | bus.set_config(&self.config); | ||
| 158 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; | 153 | self.cs.set_low().map_err(SpiBusDeviceError::Cs)?; |
| 159 | let f_res = bus.write(words); | 154 | |
| 155 | let f_res = f(&mut bus); | ||
| 156 | |||
| 157 | // On failure, it's important to still flush and deassert CS. | ||
| 158 | let flush_res = bus.flush(); | ||
| 160 | let cs_res = self.cs.set_high(); | 159 | let cs_res = self.cs.set_high(); |
| 160 | |||
| 161 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; | 161 | let f_res = f_res.map_err(SpiBusDeviceError::Spi)?; |
| 162 | flush_res.map_err(SpiBusDeviceError::Spi)?; | ||
| 162 | cs_res.map_err(SpiBusDeviceError::Cs)?; | 163 | cs_res.map_err(SpiBusDeviceError::Cs)?; |
| 163 | Ok(f_res) | 164 | Ok(f_res) |
| 164 | }) | 165 | }) |
diff --git a/embassy-embedded-hal/src/shared_bus/i2c.rs b/embassy-embedded-hal/src/shared_bus/i2c.rs index 0e964773c..18f144531 100644 --- a/embassy-embedded-hal/src/shared_bus/i2c.rs +++ b/embassy-embedded-hal/src/shared_bus/i2c.rs | |||
| @@ -119,28 +119,30 @@ where | |||
| 119 | } | 119 | } |
| 120 | } | 120 | } |
| 121 | 121 | ||
| 122 | pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS, C> { | 122 | pub struct I2cBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig> { |
| 123 | bus: &'a Mutex<M, BUS>, | 123 | bus: &'a Mutex<M, BUS>, |
| 124 | config: C, | 124 | config: BUS::Config, |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | impl<'a, M: RawMutex, BUS, C> I2cBusDeviceWithConfig<'a, M, BUS, C> { | 127 | impl<'a, M: RawMutex, BUS: SetConfig> I2cBusDeviceWithConfig<'a, M, BUS> { |
| 128 | pub fn new(bus: &'a Mutex<M, BUS>, config: C) -> Self { | 128 | pub fn new(bus: &'a Mutex<M, BUS>, config: BUS::Config) -> Self { |
| 129 | Self { bus, config } | 129 | Self { bus, config } |
| 130 | } | 130 | } |
| 131 | } | 131 | } |
| 132 | 132 | ||
| 133 | impl<'a, M: RawMutex, BUS, C> i2c::ErrorType for I2cBusDeviceWithConfig<'a, M, BUS, C> | 133 | impl<'a, M, BUS> i2c::ErrorType for I2cBusDeviceWithConfig<'a, M, BUS> |
| 134 | where | 134 | where |
| 135 | BUS: i2c::ErrorType, | 135 | BUS: i2c::ErrorType, |
| 136 | M: RawMutex, | ||
| 137 | BUS: SetConfig, | ||
| 136 | { | 138 | { |
| 137 | type Error = I2cBusDeviceError<BUS::Error>; | 139 | type Error = I2cBusDeviceError<BUS::Error>; |
| 138 | } | 140 | } |
| 139 | 141 | ||
| 140 | impl<M, BUS, C> i2c::I2c for I2cBusDeviceWithConfig<'_, M, BUS, C> | 142 | impl<M, BUS> i2c::I2c for I2cBusDeviceWithConfig<'_, M, BUS> |
| 141 | where | 143 | where |
| 142 | M: RawMutex + 'static, | 144 | M: RawMutex + 'static, |
| 143 | BUS: i2c::I2c + SetConfig<C> + 'static, | 145 | BUS: i2c::I2c + SetConfig + 'static, |
| 144 | { | 146 | { |
| 145 | type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; | 147 | type ReadFuture<'a> = impl Future<Output = Result<(), Self::Error>> + 'a where Self: 'a; |
| 146 | 148 | ||
diff --git a/embassy-embedded-hal/src/shared_bus/spi.rs b/embassy-embedded-hal/src/shared_bus/spi.rs index 04378c330..8e3762e68 100644 --- a/embassy-embedded-hal/src/shared_bus/spi.rs +++ b/embassy-embedded-hal/src/shared_bus/spi.rs | |||
| @@ -112,30 +112,31 @@ where | |||
| 112 | } | 112 | } |
| 113 | } | 113 | } |
| 114 | 114 | ||
| 115 | pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS, CS, C> { | 115 | pub struct SpiBusDeviceWithConfig<'a, M: RawMutex, BUS: SetConfig, CS> { |
| 116 | bus: &'a Mutex<M, BUS>, | 116 | bus: &'a Mutex<M, BUS>, |
| 117 | cs: CS, | 117 | cs: CS, |
| 118 | config: C, | 118 | config: BUS::Config, |
| 119 | } | 119 | } |
| 120 | 120 | ||
| 121 | impl<'a, M: RawMutex, BUS, CS, C> SpiBusDeviceWithConfig<'a, M, BUS, CS, C> { | 121 | impl<'a, M: RawMutex, BUS: SetConfig, CS> SpiBusDeviceWithConfig<'a, M, BUS, CS> { |
| 122 | pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: C) -> Self { | 122 | pub fn new(bus: &'a Mutex<M, BUS>, cs: CS, config: BUS::Config) -> Self { |
| 123 | Self { bus, cs, config } | 123 | Self { bus, cs, config } |
| 124 | } | 124 | } |
| 125 | } | 125 | } |
| 126 | 126 | ||
| 127 | impl<'a, M: RawMutex, BUS, CS, C> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS, C> | 127 | impl<'a, M, BUS, CS> spi::ErrorType for SpiBusDeviceWithConfig<'a, M, BUS, CS> |
| 128 | where | 128 | where |
| 129 | BUS: spi::ErrorType, | 129 | BUS: spi::ErrorType + SetConfig, |
| 130 | CS: OutputPin, | 130 | CS: OutputPin, |
| 131 | M: RawMutex, | ||
| 131 | { | 132 | { |
| 132 | type Error = SpiBusDeviceError<BUS::Error, CS::Error>; | 133 | type Error = SpiBusDeviceError<BUS::Error, CS::Error>; |
| 133 | } | 134 | } |
| 134 | 135 | ||
| 135 | impl<M, BUS, CS, C> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS, C> | 136 | impl<M, BUS, CS> spi::SpiDevice for SpiBusDeviceWithConfig<'_, M, BUS, CS> |
| 136 | where | 137 | where |
| 137 | M: RawMutex + 'static, | 138 | M: RawMutex + 'static, |
| 138 | BUS: spi::SpiBusFlush + SetConfig<C> + 'static, | 139 | BUS: spi::SpiBusFlush + SetConfig + 'static, |
| 139 | CS: OutputPin, | 140 | CS: OutputPin, |
| 140 | { | 141 | { |
| 141 | type Bus = BUS; | 142 | type Bus = BUS; |
