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-rw-r--r--embassy-mcxa/ram.ld109
1 files changed, 109 insertions, 0 deletions
diff --git a/embassy-mcxa/ram.ld b/embassy-mcxa/ram.ld
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1/* Simple RAM execution linker script for MCXA276 */
2MEMORY
3{
4 RAM : ORIGIN = 0x20000000, LENGTH = 128K
5}
6
7/* Pull in device default interrupt symbol aliases (e.g., CMC = DefaultHandler) */
8INCLUDE device.x
9
10
11/* Provide core exception weak aliases if not supplied by cortex-m-rt's link.x */
12PROVIDE(NonMaskableInt = DefaultHandler);
13PROVIDE(HardFault = DefaultHandler);
14PROVIDE(MemoryManagement = DefaultHandler);
15PROVIDE(BusFault = DefaultHandler);
16PROVIDE(UsageFault = DefaultHandler);
17PROVIDE(SecureFault = DefaultHandler);
18PROVIDE(SVCall = DefaultHandler);
19PROVIDE(DebugMonitor = DefaultHandler);
20PROVIDE(PendSV = DefaultHandler);
21PROVIDE(SysTick = DefaultHandler);
22
23/* In RAM-run we have no FLASH sidata; copy from sdata */
24__sidata = __sdata;
25
26/* Ensure the PAC interrupt table is kept */
27EXTERN(__INTERRUPTS);
28
29
30/* Pull in defmt's linker script to generate the defmt table that host decoders expect */
31INCLUDE defmt.x
32
33ENTRY(Reset)
34EXTERN(VECTOR_TABLE)
35EXTERN(Reset)
36EXTERN(main)
37
38/* Define _stack_start at end of RAM BEFORE it's used in vector table */
39_stack_start = ORIGIN(RAM) + LENGTH(RAM);
40
41SECTIONS
42{
43 .vector_table ORIGIN(RAM) :
44 {
45 /* Slot 0: Initial stack pointer - use our explicitly set _stack_start */
46 LONG(_stack_start);
47 /* Slot 1: Reset vector - address of Reset function with Thumb bit set */
48 LONG(Reset | 1);
49 /* Cortex-M33 core exceptions (slots 2-14) */
50 KEEP(*(.vector_table.exceptions));
51 /* Peripheral interrupt vectors provided by PAC (slots 16+) */
52 KEEP(*(.vector_table.interrupts));
53 } > RAM
54
55 .text :
56 {
57 KEEP(*(.text.Reset));
58 KEEP(*(.text.main));
59 *(.text .text.*);
60 } > RAM
61
62 /* Keep defmt table and fragments so host decoders can find metadata */
63 .defmt :
64 {
65 KEEP(*(.defmt));
66 KEEP(*(.defmt.*));
67 } > RAM
68
69 .rodata :
70 {
71 *(.rodata .rodata.*);
72 } > RAM
73
74 .data :
75 {
76 . = ALIGN(4);
77 __sdata = .;
78 *(.data .data.*);
79 . = ALIGN(4);
80 __edata = .;
81 } > RAM
82
83 /* Ensure RTT control block with "SEGGER RTT" signature is loaded to RAM */
84 .rtt :
85 {
86 KEEP(*(.rtt));
87 } > RAM
88
89 /* Place uninitialized buffers (like defmt-rtt) in RAM; load is fine for RAM-run */
90 .uninit :
91 {
92 *(.uninit .uninit.*);
93 } > RAM
94
95 .bss :
96 {
97 . = ALIGN(4);
98 __sbss = .;
99 *(.bss .bss.*);
100 . = ALIGN(4);
101 __ebss = .;
102 } > RAM
103
104 /* Discard exception unwinding info */
105 /DISCARD/ :
106 {
107 *(.ARM.exidx .ARM.exidx.*);
108 }
109}