diff options
Diffstat (limited to 'embassy-mcxa/src/adc.rs')
| -rw-r--r-- | embassy-mcxa/src/adc.rs | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/embassy-mcxa/src/adc.rs b/embassy-mcxa/src/adc.rs index 81b0b02f8..f7340e8c2 100644 --- a/embassy-mcxa/src/adc.rs +++ b/embassy-mcxa/src/adc.rs | |||
| @@ -188,7 +188,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 188 | 188 | ||
| 189 | /// Internal initialization function shared by `new` and `new_polling`. | 189 | /// Internal initialization function shared by `new` and `new_polling`. |
| 190 | fn new_inner(_inst: Peri<'a, I>, pin: Peri<'a, impl AdcPin<I>>, config: LpadcConfig) -> Self { | 190 | fn new_inner(_inst: Peri<'a, I>, pin: Peri<'a, impl AdcPin<I>>, config: LpadcConfig) -> Self { |
| 191 | let adc = &*I::ptr(); | 191 | let adc = I::ptr(); |
| 192 | 192 | ||
| 193 | let _clock_freq = unsafe { | 193 | let _clock_freq = unsafe { |
| 194 | enable_and_reset::<I>(&AdcConfig { | 194 | enable_and_reset::<I>(&AdcConfig { |
| @@ -287,14 +287,14 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 287 | 287 | ||
| 288 | /// Deinitialize the ADC peripheral. | 288 | /// Deinitialize the ADC peripheral. |
| 289 | pub fn deinit(&self) { | 289 | pub fn deinit(&self) { |
| 290 | let adc = &*I::ptr(); | 290 | let adc = I::ptr(); |
| 291 | adc.ctrl().modify(|_, w| w.adcen().disabled()); | 291 | adc.ctrl().modify(|_, w| w.adcen().disabled()); |
| 292 | } | 292 | } |
| 293 | 293 | ||
| 294 | /// Perform offset calibration. | 294 | /// Perform offset calibration. |
| 295 | /// Waits for calibration to complete before returning. | 295 | /// Waits for calibration to complete before returning. |
| 296 | pub fn do_offset_calibration(&self) { | 296 | pub fn do_offset_calibration(&self) { |
| 297 | let adc = &*I::ptr(); | 297 | let adc = I::ptr(); |
| 298 | // Enable calibration mode | 298 | // Enable calibration mode |
| 299 | adc.ctrl() | 299 | adc.ctrl() |
| 300 | .modify(|_, w| w.calofs().offset_calibration_request_pending()); | 300 | .modify(|_, w| w.calofs().offset_calibration_request_pending()); |
| @@ -330,7 +330,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 330 | 330 | ||
| 331 | /// Perform automatic gain calibration. | 331 | /// Perform automatic gain calibration. |
| 332 | pub fn do_auto_calibration(&self) { | 332 | pub fn do_auto_calibration(&self) { |
| 333 | let adc = &*I::ptr(); | 333 | let adc = I::ptr(); |
| 334 | adc.ctrl().modify(|_, w| w.cal_req().calibration_request_pending()); | 334 | adc.ctrl().modify(|_, w| w.cal_req().calibration_request_pending()); |
| 335 | 335 | ||
| 336 | while adc.gcc0().read().rdy().is_gain_cal_not_valid() {} | 336 | while adc.gcc0().read().rdy().is_gain_cal_not_valid() {} |
| @@ -359,7 +359,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 359 | /// # Arguments | 359 | /// # Arguments |
| 360 | /// * `trigger_id_mask` - Bitmask of trigger IDs to activate (bit N = trigger N) | 360 | /// * `trigger_id_mask` - Bitmask of trigger IDs to activate (bit N = trigger N) |
| 361 | pub fn do_software_trigger(&self, trigger_id_mask: u32) { | 361 | pub fn do_software_trigger(&self, trigger_id_mask: u32) { |
| 362 | let adc = &*I::ptr(); | 362 | let adc = I::ptr(); |
| 363 | adc.swtrig().write(|w| unsafe { w.bits(trigger_id_mask) }); | 363 | adc.swtrig().write(|w| unsafe { w.bits(trigger_id_mask) }); |
| 364 | } | 364 | } |
| 365 | 365 | ||
| @@ -391,7 +391,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 391 | /// * `index` - Command index | 391 | /// * `index` - Command index |
| 392 | /// * `config` - Command configuration | 392 | /// * `config` - Command configuration |
| 393 | pub fn set_conv_command_config(&self, index: u32, config: &ConvCommandConfig) { | 393 | pub fn set_conv_command_config(&self, index: u32, config: &ConvCommandConfig) { |
| 394 | let adc = &*I::ptr(); | 394 | let adc = I::ptr(); |
| 395 | 395 | ||
| 396 | macro_rules! write_cmd { | 396 | macro_rules! write_cmd { |
| 397 | ($idx:expr) => {{ | 397 | ($idx:expr) => {{ |
| @@ -456,7 +456,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 456 | /// * `trigger_id` - Trigger index (0-15) | 456 | /// * `trigger_id` - Trigger index (0-15) |
| 457 | /// * `config` - Trigger configuration | 457 | /// * `config` - Trigger configuration |
| 458 | pub fn set_conv_trigger_config(&self, trigger_id: usize, config: &ConvTriggerConfig) { | 458 | pub fn set_conv_trigger_config(&self, trigger_id: usize, config: &ConvTriggerConfig) { |
| 459 | let adc = &*I::ptr(); | 459 | let adc = I::ptr(); |
| 460 | let tctrl = &adc.tctrl(trigger_id); | 460 | let tctrl = &adc.tctrl(trigger_id); |
| 461 | 461 | ||
| 462 | tctrl.write(|w| unsafe { | 462 | tctrl.write(|w| unsafe { |
| @@ -475,7 +475,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 475 | /// | 475 | /// |
| 476 | /// Clears all pending conversion results from the FIFO. | 476 | /// Clears all pending conversion results from the FIFO. |
| 477 | pub fn do_reset_fifo(&self) { | 477 | pub fn do_reset_fifo(&self) { |
| 478 | let adc = &*I::ptr(); | 478 | let adc = I::ptr(); |
| 479 | adc.ctrl().modify(|_, w| w.rstfifo0().trigger_reset()); | 479 | adc.ctrl().modify(|_, w| w.rstfifo0().trigger_reset()); |
| 480 | } | 480 | } |
| 481 | 481 | ||
| @@ -486,7 +486,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 486 | /// # Arguments | 486 | /// # Arguments |
| 487 | /// * `mask` - Bitmask of interrupt sources to enable | 487 | /// * `mask` - Bitmask of interrupt sources to enable |
| 488 | pub fn enable_interrupt(&self, mask: u32) { | 488 | pub fn enable_interrupt(&self, mask: u32) { |
| 489 | let adc = &*I::ptr(); | 489 | let adc = I::ptr(); |
| 490 | adc.ie().modify(|r, w| unsafe { w.bits(r.bits() | mask) }); | 490 | adc.ie().modify(|r, w| unsafe { w.bits(r.bits() | mask) }); |
| 491 | } | 491 | } |
| 492 | 492 | ||
| @@ -497,7 +497,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 497 | /// # Arguments | 497 | /// # Arguments |
| 498 | /// * `mask` - Bitmask of interrupt sources to disable | 498 | /// * `mask` - Bitmask of interrupt sources to disable |
| 499 | pub fn disable_interrupt(&self, mask: u32) { | 499 | pub fn disable_interrupt(&self, mask: u32) { |
| 500 | let adc = &*I::ptr(); | 500 | let adc = I::ptr(); |
| 501 | adc.ie().modify(|r, w| unsafe { w.bits(r.bits() & !mask) }); | 501 | adc.ie().modify(|r, w| unsafe { w.bits(r.bits() & !mask) }); |
| 502 | } | 502 | } |
| 503 | 503 | ||
| @@ -510,7 +510,7 @@ impl<'a, I: Instance> Adc<'a, I> { | |||
| 510 | /// - `Some(ConvResult)` if a result is available | 510 | /// - `Some(ConvResult)` if a result is available |
| 511 | /// - `Err(AdcError::FifoEmpty)` if the FIFO is empty | 511 | /// - `Err(AdcError::FifoEmpty)` if the FIFO is empty |
| 512 | pub fn get_conv_result(&self) -> Result<ConvResult, AdcError> { | 512 | pub fn get_conv_result(&self) -> Result<ConvResult, AdcError> { |
| 513 | let adc = &*I::ptr(); | 513 | let adc = I::ptr(); |
| 514 | let fifo = adc.resfifo0().read().bits(); | 514 | let fifo = adc.resfifo0().read().bits(); |
| 515 | const VALID_MASK: u32 = 1 << 31; | 515 | const VALID_MASK: u32 = 1 << 31; |
| 516 | if fifo & VALID_MASK == 0 { | 516 | if fifo & VALID_MASK == 0 { |
