1 files changed, 97 insertions, 19 deletions

diff --git a/embassy-mspm0/build.rs b/embassy-mspm0/build.rs
index d294bc422..ac40adbdf 100644
--- a/embassy-mspm0/build.rs
+++ b/embassy-mspm0/build.rs
@@ -16,21 +16,22 @@ use quote::{format_ident, quote};
 mod common;
 
 fn main() {
-    generate_code();
-    interrupt_group_linker_magic();
-}
-
-fn generate_code() {
     let mut cfgs = common::CfgSet::new();
     common::set_target_cfgs(&mut cfgs);
 
+    generate_code(&mut cfgs);
+    select_gpio_features(&mut cfgs);
+    interrupt_group_linker_magic();
+}
+
+fn generate_code(cfgs: &mut CfgSet) {
     #[cfg(any(feature = "rt"))]
     println!(
         "cargo:rustc-link-search={}",
         PathBuf::from(env::var_os("OUT_DIR").unwrap()).display(),
     );
 
-    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1"]);
+    cfgs.declare_all(&["gpio_pb", "gpio_pc", "int_group1", "unicomm"]);
 
     let chip_name = match env::vars()
         .map(|(a, _)| a)
@@ -53,9 +54,9 @@ fn generate_code() {
         cfgs.declare_all(&get_chip_cfgs(&chip));
     }
 
-    let mut singletons = get_singletons(&mut cfgs);
+    let mut singletons = get_singletons(cfgs);
 
-    time_driver(&mut singletons, &mut cfgs);
+    time_driver(&mut singletons, cfgs);
 
     let mut g = TokenStream::new();
 
@@ -68,7 +69,7 @@ fn generate_code() {
     g.extend(generate_pin_trait_impls());
     g.extend(generate_groups());
     g.extend(generate_dma_channel_count());
-    g.extend(generate_adc_constants(&mut cfgs));
+    g.extend(generate_adc_constants(cfgs));
 
     let out_dir = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
     let out_file = out_dir.join("_generated.rs").to_string_lossy().to_string();
@@ -115,6 +116,14 @@ fn get_chip_cfgs(chip_name: &str) -> Vec<String> {
         cfgs.push("mspm0g351x".to_string());
     }
 
+    if chip_name.starts_with("mspm0g518") {
+        cfgs.push("mspm0g518x".to_string());
+    }
+
+    if chip_name.starts_with("mspm0h321") {
+        cfgs.push("mspm0h321x".to_string());
+    }
+
     if chip_name.starts_with("mspm0l110") {
         cfgs.push("mspm0l110x".to_string());
     }
@@ -189,8 +198,15 @@ fn generate_groups() -> TokenStream {
                 use crate::pac::#group_enum;
 
                 let group = crate::pac::CPUSS.int_group(#group_number);
-                // MUST subtract by 1 since 0 is NO_INTR
-                let iidx = group.iidx().read().stat().to_bits() - 1;
+                let stat = group.iidx().read().stat();
+
+                // check for spurious interrupts
+                if stat == crate::pac::cpuss::vals::Iidx::NO_INTR {
+                    return;
+                }
+
+                // MUST subtract by 1 because NO_INTR offsets IIDX values.
+                let iidx = stat.to_bits() - 1;
 
                 let Ok(group) = #group_enum::try_from(iidx as u8) else {
                     return;
@@ -208,7 +224,7 @@ fn generate_groups() -> TokenStream {
 
         #[cfg(feature = "rt")]
         mod group_vectors {
-            extern "Rust" {
+            unsafe extern "Rust" {
                 #(#group_vectors)*
             }
         }
@@ -288,6 +304,15 @@ fn get_singletons(cfgs: &mut common::CfgSet) -> Vec<Singleton> {
             // by the HAL.
             "iomux" | "cpuss" => true,
 
+            // Unicomm instances get their own singletons, but we need to enable a cfg for unicomm drivers.
+            "unicomm" => {
+                cfgs.enable("unicomm");
+                false
+            }
+
+            // TODO: Remove after TIMB is fixed
+            "tim" if peripheral.name.starts_with("TIMB") => true,
+
             _ => false,
         };
 
@@ -411,6 +436,8 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
     // Verify the selected timer is available
     let selected_timer = match time_driver.as_ref().map(|x| x.as_ref()) {
         None => "",
+        // TODO: Fix TIMB0
+        // Some("timb0") => "TIMB0",
         Some("timg0") => "TIMG0",
         Some("timg1") => "TIMG1",
         Some("timg2") => "TIMG2",
@@ -428,16 +455,17 @@ fn time_driver(singletons: &mut Vec<Singleton>, cfgs: &mut CfgSet) {
         Some("tima1") => "TIMA1",
         Some("any") => {
             // Order of timer candidates:
-            // 1. 16-bit, 2 channel
-            // 2. 16-bit, 2 channel with shadow registers
-            // 3. 16-bit, 4 channel
-            // 4. 16-bit with QEI
-            // 5. Advanced timers
+            // 1. Basic timers
+            // 2. 16-bit, 2 channel
+            // 3. 16-bit, 2 channel with shadow registers
+            // 4. 16-bit, 4 channel
+            // 5. 16-bit with QEI
+            // 6. Advanced timers
             //
-            // TODO: Select RTC first if available
             // TODO: 32-bit timers are not considered yet
             [
-                // 16-bit, 2 channel
+                // basic timers. No PWM pins
+                // "TIMB0", // 16-bit, 2 channel
                 "TIMG0", "TIMG1", "TIMG2", "TIMG3", // 16-bit, 2 channel with shadow registers
                 "TIMG4", "TIMG5", "TIMG6", "TIMG7",  // 16-bit, 4 channel
                 "TIMG14", // 16-bit with QEI
@@ -507,6 +535,8 @@ fn generate_timers() -> TokenStream {
         .peripherals
         .iter()
         .filter(|p| p.name.starts_with("TIM"))
+        // TODO: Fix TIMB when used at time driver.
+        .filter(|p| !p.name.starts_with("TIMB"))
         .map(|peripheral| {
             let name = Ident::new(&peripheral.name, Span::call_site());
             let timers = &*TIMERS;
@@ -579,6 +609,7 @@ fn generate_peripheral_instances() -> TokenStream {
             "i2c" => Some(quote! { impl_i2c_instance!(#peri, #fifo_size); }),
             "wwdt" => Some(quote! { impl_wwdt_instance!(#peri); }),
             "adc" => Some(quote! { impl_adc_instance!(#peri); }),
+            "mathacl" => Some(quote! { impl_mathacl_instance!(#peri); }),
             _ => None,
         };
 
@@ -646,6 +677,35 @@ fn generate_pin_trait_impls() -> TokenStream {
     }
 }
 
+fn select_gpio_features(cfgs: &mut CfgSet) {
+    cfgs.declare_all(&[
+        "gpioa_interrupt",
+        "gpioa_group",
+        "gpiob_interrupt",
+        "gpiob_group",
+        "gpioc_group",
+    ]);
+
+    for interrupt in METADATA.interrupts.iter() {
+        match interrupt.name {
+            "GPIOA" => cfgs.enable("gpioa_interrupt"),
+            "GPIOB" => cfgs.enable("gpiob_interrupt"),
+            _ => (),
+        }
+    }
+
+    for group in METADATA.interrupt_groups.iter() {
+        for interrupt in group.interrupts {
+            match interrupt.name {
+                "GPIOA" => cfgs.enable("gpioa_group"),
+                "GPIOB" => cfgs.enable("gpiob_group"),
+                "GPIOC" => cfgs.enable("gpioc_group"),
+                _ => (),
+            }
+        }
+    }
+}
+
 /// rustfmt a given path.
 /// Failures are logged to stderr and ignored.
 fn rustfmt(path: impl AsRef<Path>) {
@@ -688,6 +748,24 @@ struct TimerDesc {
 const TIMERS: LazyLock<HashMap<String, TimerDesc>> = LazyLock::new(|| {
     let mut map = HashMap::new();
     map.insert(
+        "TIMB0".into(),
+        TimerDesc {
+            bits: 16,
+            prescaler: true,
+            repeat_counter: false,
+            ccp_channels_internal: 2,
+            ccp_channels_external: 2,
+            external_pwm_channels: 0,
+            phase_load: false,
+            shadow_load: false,
+            shadow_ccs: false,
+            deadband: false,
+            fault_handler: false,
+            qei_hall: false,
+        },
+    );
+
+    map.insert(
         "TIMG0".into(),
         TimerDesc {
             bits: 16,