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-rw-r--r--embassy-mspm0/src/gpio.rs4
1 files changed, 4 insertions, 0 deletions
diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs
index d8eb42dc2..709102c59 100644
--- a/embassy-mspm0/src/gpio.rs
+++ b/embassy-mspm0/src/gpio.rs
@@ -841,6 +841,7 @@ impl<'d> embedded_hal_async::digital::Wait for OutputOpenDrain<'d> {
841 } 841 }
842} 842}
843 843
844#[cfg_attr(mspm0g518x, allow(dead_code))]
844#[derive(Copy, Clone)] 845#[derive(Copy, Clone)]
845pub struct PfType { 846pub struct PfType {
846 pull: Pull, 847 pull: Pull,
@@ -948,6 +949,7 @@ pub(crate) trait SealedPin {
948 }); 949 });
949 } 950 }
950 951
952 #[cfg_attr(mspm0g518x, allow(dead_code))]
951 fn update_pf(&self, ty: PfType) { 953 fn update_pf(&self, ty: PfType) {
952 let pincm = pac::IOMUX.pincm(self._pin_cm() as usize); 954 let pincm = pac::IOMUX.pincm(self._pin_cm() as usize);
953 let pf = pincm.read().pf(); 955 let pf = pincm.read().pf();
@@ -955,6 +957,7 @@ pub(crate) trait SealedPin {
955 set_pf(self._pin_cm() as usize, pf, ty); 957 set_pf(self._pin_cm() as usize, pf, ty);
956 } 958 }
957 959
960 #[cfg_attr(mspm0g518x, allow(dead_code))]
958 fn set_as_pf(&self, pf: u8, ty: PfType) { 961 fn set_as_pf(&self, pf: u8, ty: PfType) {
959 set_pf(self._pin_cm() as usize, pf, ty) 962 set_pf(self._pin_cm() as usize, pf, ty)
960 } 963 }
@@ -967,6 +970,7 @@ pub(crate) trait SealedPin {
967 /// 970 ///
968 /// Note that this also disables the internal weak pull-up and pull-down resistors. 971 /// Note that this also disables the internal weak pull-up and pull-down resistors.
969 #[inline] 972 #[inline]
973 #[cfg_attr(mspm0g518x, allow(dead_code))]
970 fn set_as_disconnected(&self) { 974 fn set_as_disconnected(&self) {
971 self.set_as_analog(); 975 self.set_as_analog();
972 } 976 }