1 files changed, 18 insertions, 6 deletions

diff --git a/embassy-mspm0/src/gpio.rs b/embassy-mspm0/src/gpio.rs
index 19a6230b6..738d51928 100644
--- a/embassy-mspm0/src/gpio.rs
+++ b/embassy-mspm0/src/gpio.rs
@@ -1119,24 +1119,36 @@ impl Iterator for BitIter {
     }
 }
 
-// C110x has a dedicated interrupt just for GPIOA, as it does not have a GROUP1 interrupt.
+// C110x and L110x have a dedicated interrupts just for GPIOA.
+//
+// These chips do not have a GROUP1 interrupt.
 #[cfg(all(feature = "rt", any(mspm0c110x, mspm0l110x)))]
 #[interrupt]
 fn GPIOA() {
-    gpioa_interrupt();
+    irq_handler(pac::GPIOA, &PORTA_WAKERS);
 }
 
-#[cfg(feature = "rt")]
-pub(crate) fn gpioa_interrupt() {
+// These symbols are weakly defined as DefaultHandler and are called by the interrupt group implementation.
+//
+// Defining these as no_mangle is required so that the linker will pick these over the default handler.
+
+#[cfg(all(feature = "rt", not(any(mspm0c110x, mspm0l110x))))]
+#[no_mangle]
+#[allow(non_snake_case)]
+fn GPIOA() {
     irq_handler(pac::GPIOA, &PORTA_WAKERS);
 }
 
 #[cfg(all(feature = "rt", gpio_pb))]
-pub(crate) fn gpiob_interrupt() {
+#[no_mangle]
+#[allow(non_snake_case)]
+fn GPIOB() {
     irq_handler(pac::GPIOB, &PORTB_WAKERS);
 }
 
 #[cfg(all(feature = "rt", gpio_pc))]
-pub(crate) fn gpioc_interrupt() {
+#[allow(non_snake_case)]
+#[no_mangle]
+fn GPIOC() {
     irq_handler(pac::GPIOC, &PORTC_WAKERS);
 }