diff options
Diffstat (limited to 'embassy-nrf/src/twim.rs')
| -rw-r--r-- | embassy-nrf/src/twim.rs | 47 |
1 files changed, 10 insertions, 37 deletions
diff --git a/embassy-nrf/src/twim.rs b/embassy-nrf/src/twim.rs index ef4c929a3..9ae569609 100644 --- a/embassy-nrf/src/twim.rs +++ b/embassy-nrf/src/twim.rs | |||
| @@ -846,20 +846,6 @@ mod eh1 { | |||
| 846 | self.blocking_write(address, buffer) | 846 | self.blocking_write(address, buffer) |
| 847 | } | 847 | } |
| 848 | 848 | ||
| 849 | fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error> | ||
| 850 | where | ||
| 851 | B: IntoIterator<Item = u8>, | ||
| 852 | { | ||
| 853 | todo!(); | ||
| 854 | } | ||
| 855 | |||
| 856 | fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error> | ||
| 857 | where | ||
| 858 | B: IntoIterator<Item = u8>, | ||
| 859 | { | ||
| 860 | todo!(); | ||
| 861 | } | ||
| 862 | |||
| 863 | fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { | 849 | fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { |
| 864 | self.blocking_write_read(address, wr_buffer, rd_buffer) | 850 | self.blocking_write_read(address, wr_buffer, rd_buffer) |
| 865 | } | 851 | } |
| @@ -871,13 +857,6 @@ mod eh1 { | |||
| 871 | ) -> Result<(), Self::Error> { | 857 | ) -> Result<(), Self::Error> { |
| 872 | todo!(); | 858 | todo!(); |
| 873 | } | 859 | } |
| 874 | |||
| 875 | fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error> | ||
| 876 | where | ||
| 877 | O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>, | ||
| 878 | { | ||
| 879 | todo!(); | ||
| 880 | } | ||
| 881 | } | 860 | } |
| 882 | } | 861 | } |
| 883 | 862 | ||
| @@ -885,28 +864,22 @@ mod eh1 { | |||
| 885 | mod eha { | 864 | mod eha { |
| 886 | use super::*; | 865 | use super::*; |
| 887 | impl<'d, T: Instance> embedded_hal_async::i2c::I2c for Twim<'d, T> { | 866 | impl<'d, T: Instance> embedded_hal_async::i2c::I2c for Twim<'d, T> { |
| 888 | async fn read<'a>(&'a mut self, address: u8, buffer: &'a mut [u8]) -> Result<(), Error> { | 867 | async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> { |
| 889 | self.read(address, buffer).await | 868 | self.read(address, read).await |
| 890 | } | 869 | } |
| 891 | 870 | ||
| 892 | async fn write<'a>(&'a mut self, address: u8, bytes: &'a [u8]) -> Result<(), Error> { | 871 | async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> { |
| 893 | self.write(address, bytes).await | 872 | self.write(address, write).await |
| 894 | } | 873 | } |
| 895 | 874 | async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> { | |
| 896 | async fn write_read<'a>( | 875 | self.write_read(address, write, read).await |
| 897 | &'a mut self, | ||
| 898 | address: u8, | ||
| 899 | wr_buffer: &'a [u8], | ||
| 900 | rd_buffer: &'a mut [u8], | ||
| 901 | ) -> Result<(), Error> { | ||
| 902 | self.write_read(address, wr_buffer, rd_buffer).await | ||
| 903 | } | 876 | } |
| 904 | 877 | ||
| 905 | async fn transaction<'a, 'b>( | 878 | async fn transaction( |
| 906 | &'a mut self, | 879 | &mut self, |
| 907 | address: u8, | 880 | address: u8, |
| 908 | operations: &'a mut [embedded_hal_async::i2c::Operation<'b>], | 881 | operations: &mut [embedded_hal_1::i2c::Operation<'_>], |
| 909 | ) -> Result<(), Error> { | 882 | ) -> Result<(), Self::Error> { |
| 910 | let _ = address; | 883 | let _ = address; |
| 911 | let _ = operations; | 884 | let _ = operations; |
| 912 | todo!() | 885 | todo!() |
