diff options
Diffstat (limited to 'embassy-nxp/src/chips/lpc55.rs')
| -rw-r--r-- | embassy-nxp/src/chips/lpc55.rs | 115 |
1 files changed, 8 insertions, 107 deletions
diff --git a/embassy-nxp/src/chips/lpc55.rs b/embassy-nxp/src/chips/lpc55.rs index 9f4e7269f..7967e07d1 100644 --- a/embassy-nxp/src/chips/lpc55.rs +++ b/embassy-nxp/src/chips/lpc55.rs | |||
| @@ -1,109 +1,10 @@ | |||
| 1 | pub use nxp_pac as pac; | 1 | pub(crate) mod _generated { |
| 2 | #![allow(dead_code)] | ||
| 3 | #![allow(unused_imports)] | ||
| 4 | #![allow(non_snake_case)] | ||
| 5 | #![allow(missing_docs)] | ||
| 2 | 6 | ||
| 3 | embassy_hal_internal::interrupt_mod!( | 7 | include!(concat!(env!("OUT_DIR"), "/_generated.rs")); |
| 4 | FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7 | ||
| 5 | ); | ||
| 6 | |||
| 7 | embassy_hal_internal::peripherals! { | ||
| 8 | // External pins. These are not only GPIOs, they are multi-purpose pins and can be used by other | ||
| 9 | // peripheral types (e.g. I2C). | ||
| 10 | PIO0_0, | ||
| 11 | PIO0_1, | ||
| 12 | PIO0_2, | ||
| 13 | PIO0_3, | ||
| 14 | PIO0_4, | ||
| 15 | PIO0_5, | ||
| 16 | PIO0_6, | ||
| 17 | PIO0_7, | ||
| 18 | PIO0_8, | ||
| 19 | PIO0_9, | ||
| 20 | PIO0_10, | ||
| 21 | PIO0_11, | ||
| 22 | PIO0_12, | ||
| 23 | PIO0_13, | ||
| 24 | PIO0_14, | ||
| 25 | PIO0_15, | ||
| 26 | PIO0_16, | ||
| 27 | PIO0_17, | ||
| 28 | PIO0_18, | ||
| 29 | PIO0_19, | ||
| 30 | PIO0_20, | ||
| 31 | PIO0_21, | ||
| 32 | PIO0_22, | ||
| 33 | PIO0_23, | ||
| 34 | PIO0_24, | ||
| 35 | PIO0_25, | ||
| 36 | PIO0_26, | ||
| 37 | PIO0_27, | ||
| 38 | PIO0_28, | ||
| 39 | PIO0_29, | ||
| 40 | PIO0_30, | ||
| 41 | PIO0_31, | ||
| 42 | PIO1_0, | ||
| 43 | PIO1_1, | ||
| 44 | PIO1_2, | ||
| 45 | PIO1_3, | ||
| 46 | PIO1_4, | ||
| 47 | PIO1_5, | ||
| 48 | PIO1_6, | ||
| 49 | PIO1_7, | ||
| 50 | PIO1_8, | ||
| 51 | PIO1_9, | ||
| 52 | PIO1_10, | ||
| 53 | PIO1_11, | ||
| 54 | PIO1_12, | ||
| 55 | PIO1_13, | ||
| 56 | PIO1_14, | ||
| 57 | PIO1_15, | ||
| 58 | PIO1_16, | ||
| 59 | PIO1_17, | ||
| 60 | PIO1_18, | ||
| 61 | PIO1_19, | ||
| 62 | PIO1_20, | ||
| 63 | PIO1_21, | ||
| 64 | PIO1_22, | ||
| 65 | PIO1_23, | ||
| 66 | PIO1_24, | ||
| 67 | PIO1_25, | ||
| 68 | PIO1_26, | ||
| 69 | PIO1_27, | ||
| 70 | PIO1_28, | ||
| 71 | PIO1_29, | ||
| 72 | PIO1_30, | ||
| 73 | PIO1_31, | ||
| 74 | |||
| 75 | // Direct Memory Access (DMA) channels. They are used for asynchronous modes of peripherals. | ||
| 76 | DMA_CH0, | ||
| 77 | DMA_CH1, | ||
| 78 | DMA_CH2, | ||
| 79 | DMA_CH3, | ||
| 80 | DMA_CH4, | ||
| 81 | DMA_CH5, | ||
| 82 | DMA_CH6, | ||
| 83 | DMA_CH7, | ||
| 84 | DMA_CH8, | ||
| 85 | DMA_CH9, | ||
| 86 | DMA_CH10, | ||
| 87 | DMA_CH11, | ||
| 88 | DMA_CH12, | ||
| 89 | DMA_CH13, | ||
| 90 | DMA_CH14, | ||
| 91 | DMA_CH15, | ||
| 92 | DMA_CH16, | ||
| 93 | DMA_CH17, | ||
| 94 | DMA_CH18, | ||
| 95 | DMA_CH19, | ||
| 96 | DMA_CH20, | ||
| 97 | DMA_CH21, | ||
| 98 | DMA_CH22, | ||
| 99 | |||
| 100 | // Universal Synchronous/Asynchronous Receiver/Transmitter (USART) instances. | ||
| 101 | USART0, | ||
| 102 | USART1, | ||
| 103 | USART2, | ||
| 104 | USART3, | ||
| 105 | USART4, | ||
| 106 | USART5, | ||
| 107 | USART6, | ||
| 108 | USART7 | ||
| 109 | } | 8 | } |
| 9 | |||
| 10 | pub use _generated::*; | ||
