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-rw-r--r--embassy-nxp/CHANGELOG.md1
-rw-r--r--embassy-nxp/src/gpio/lpc55.rs66
-rw-r--r--embassy-nxp/src/usart/lpc55.rs38
3 files changed, 40 insertions, 65 deletions
diff --git a/embassy-nxp/CHANGELOG.md b/embassy-nxp/CHANGELOG.md
index 0fb677cd8..295d45c2d 100644
--- a/embassy-nxp/CHANGELOG.md
+++ b/embassy-nxp/CHANGELOG.md
@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
7 7
8<!-- next-header --> 8<!-- next-header -->
9## Unreleased - ReleaseDate 9## Unreleased - ReleaseDate
10- LPC55: Remove internal match_iocon macro
10- LPC55: DMA Controller and asynchronous version of USART 11- LPC55: DMA Controller and asynchronous version of USART
11- Moved NXP LPC55S69 from `lpc55-pac` to `nxp-pac` 12- Moved NXP LPC55S69 from `lpc55-pac` to `nxp-pac`
12- First release with changelog. 13- First release with changelog.
diff --git a/embassy-nxp/src/gpio/lpc55.rs b/embassy-nxp/src/gpio/lpc55.rs
index ac8a27d4f..6039d8ca8 100644
--- a/embassy-nxp/src/gpio/lpc55.rs
+++ b/embassy-nxp/src/gpio/lpc55.rs
@@ -1,7 +1,8 @@
1use embassy_hal_internal::{PeripheralType, impl_peripheral}; 1use embassy_hal_internal::{PeripheralType, impl_peripheral};
2 2
3use crate::pac::common::{RW, Reg};
3use crate::pac::iocon::vals::{PioDigimode, PioMode}; 4use crate::pac::iocon::vals::{PioDigimode, PioMode};
4use crate::pac::{GPIO, IOCON, SYSCON}; 5use crate::pac::{GPIO, IOCON, SYSCON, iocon};
5use crate::{Peri, peripherals}; 6use crate::{Peri, peripherals};
6 7
7pub(crate) fn init() { 8pub(crate) fn init() {
@@ -109,13 +110,7 @@ impl<'d> Input<'d> {
109 110
110 /// Set the pull configuration for the pin. To disable the pull, use [Pull::None]. 111 /// Set the pull configuration for the pin. To disable the pull, use [Pull::None].
111 pub fn set_pull(&mut self, pull: Pull) { 112 pub fn set_pull(&mut self, pull: Pull) {
112 match_iocon!(register, self.pin.pin_bank(), self.pin.pin_number(), { 113 self.pin.set_pull(pull);
113 register.modify(|w| match pull {
114 Pull::None => w.set_mode(PioMode::INACTIVE),
115 Pull::Up => w.set_mode(PioMode::PULL_UP),
116 Pull::Down => w.set_mode(PioMode::PULL_DOWN),
117 });
118 });
119 } 114 }
120 115
121 /// Get the current input level of the pin. 116 /// Get the current input level of the pin.
@@ -193,11 +188,20 @@ impl<'d> Flex<'d> {
193 1 << self.pin.pin_number() 188 1 << self.pin.pin_number()
194 } 189 }
195 190
191 /// Set the pull configuration for the pin. To disable the pull, use [Pull::None].
192 pub fn set_pull(&mut self, pull: Pull) {
193 self.pin.pio().modify(|w| match pull {
194 Pull::None => w.set_mode(PioMode::INACTIVE),
195 Pull::Up => w.set_mode(PioMode::PULL_UP),
196 Pull::Down => w.set_mode(PioMode::PULL_DOWN),
197 });
198 }
199
196 /// Set the pin to digital mode. This is required for using a pin as a GPIO pin. The default 200 /// Set the pin to digital mode. This is required for using a pin as a GPIO pin. The default
197 /// setting for pins is (usually) non-digital. 201 /// setting for pins is (usually) non-digital.
198 fn set_as_digital(&mut self) { 202 fn set_as_digital(&mut self) {
199 match_iocon!(register, self.pin_bank(), self.pin_number(), { 203 self.pin.pio().modify(|w| {
200 register.modify(|w| w.set_digimode(PioDigimode::DIGITAL)); 204 w.set_digimode(PioDigimode::DIGITAL);
201 }); 205 });
202 } 206 }
203 207
@@ -220,6 +224,14 @@ impl<'d> Flex<'d> {
220pub(crate) trait SealedPin: Sized { 224pub(crate) trait SealedPin: Sized {
221 fn pin_bank(&self) -> Bank; 225 fn pin_bank(&self) -> Bank;
222 fn pin_number(&self) -> u8; 226 fn pin_number(&self) -> u8;
227
228 #[inline]
229 fn pio(&self) -> Reg<iocon::regs::Pio, RW> {
230 match self.pin_bank() {
231 Bank::Bank0 => IOCON.pio0(self.pin_number() as usize),
232 Bank::Bank1 => IOCON.pio1(self.pin_number() as usize),
233 }
234 }
223} 235}
224 236
225/// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an 237/// Interface for a Pin that can be configured by an [Input] or [Output] driver, or converted to an
@@ -272,40 +284,6 @@ impl SealedPin for AnyPin {
272 } 284 }
273} 285}
274 286
275/// Match the pin bank and number of a pin to the corresponding IOCON register.
276///
277/// # Example
278/// ```
279/// use embassy_nxp::gpio::Bank;
280/// use embassy_nxp::pac_utils::{iocon_reg, match_iocon};
281///
282/// // Make pin PIO1_6 digital and set it to pull-down mode.
283/// match_iocon!(register, Bank::Bank1, 6, {
284/// register.modify(|w|{
285/// w.set_mode(PioMode::PULL_DOWN);
286/// w.set_digimode(PioDigimode::DIGITAL);
287///
288/// }
289/// });
290/// ```
291macro_rules! match_iocon {
292 ($register:ident, $pin_bank:expr, $pin_number:expr, $action:expr) => {
293 match $pin_bank {
294 Bank::Bank0 => {
295 let $register = IOCON.pio0($pin_number as usize);
296 $action;
297 }
298
299 Bank::Bank1 => {
300 let $register = IOCON.pio1($pin_number as usize);
301 $action;
302 }
303 }
304 };
305}
306
307pub(crate) use match_iocon;
308
309macro_rules! impl_pin { 287macro_rules! impl_pin {
310 ($name:ident, $bank:expr, $pin_num:expr) => { 288 ($name:ident, $bank:expr, $pin_num:expr) => {
311 impl Pin for peripherals::$name {} 289 impl Pin for peripherals::$name {}
diff --git a/embassy-nxp/src/usart/lpc55.rs b/embassy-nxp/src/usart/lpc55.rs
index 0be5a8ce7..6cbde82a3 100644
--- a/embassy-nxp/src/usart/lpc55.rs
+++ b/embassy-nxp/src/usart/lpc55.rs
@@ -11,7 +11,7 @@ use embassy_sync::waitqueue::AtomicWaker;
11use embedded_io::{self, ErrorKind}; 11use embedded_io::{self, ErrorKind};
12 12
13use crate::dma::{AnyChannel, Channel}; 13use crate::dma::{AnyChannel, Channel};
14use crate::gpio::{AnyPin, Bank, SealedPin, match_iocon}; 14use crate::gpio::{AnyPin, SealedPin};
15use crate::interrupt::Interrupt; 15use crate::interrupt::Interrupt;
16use crate::interrupt::typelevel::{Binding, Interrupt as _}; 16use crate::interrupt::typelevel::{Binding, Interrupt as _};
17use crate::pac::flexcomm::Flexcomm as FlexcommReg; 17use crate::pac::flexcomm::Flexcomm as FlexcommReg;
@@ -555,29 +555,25 @@ impl<'d, M: Mode> Usart<'d, M> {
555 555
556 fn pin_config<T: Instance>(tx: Option<Peri<'_, AnyPin>>, rx: Option<Peri<'_, AnyPin>>) { 556 fn pin_config<T: Instance>(tx: Option<Peri<'_, AnyPin>>, rx: Option<Peri<'_, AnyPin>>) {
557 if let Some(tx_pin) = tx { 557 if let Some(tx_pin) = tx {
558 match_iocon!(register, tx_pin.pin_bank(), tx_pin.pin_number(), { 558 tx_pin.pio().modify(|w| {
559 register.modify(|w| { 559 w.set_func(T::tx_pin_func());
560 w.set_func(T::tx_pin_func()); 560 w.set_mode(iocon::vals::PioMode::INACTIVE);
561 w.set_mode(iocon::vals::PioMode::INACTIVE); 561 w.set_slew(iocon::vals::PioSlew::STANDARD);
562 w.set_slew(iocon::vals::PioSlew::STANDARD); 562 w.set_invert(false);
563 w.set_invert(false); 563 w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
564 w.set_digimode(iocon::vals::PioDigimode::DIGITAL); 564 w.set_od(iocon::vals::PioOd::NORMAL);
565 w.set_od(iocon::vals::PioOd::NORMAL); 565 });
566 });
567 })
568 } 566 }
569 567
570 if let Some(rx_pin) = rx { 568 if let Some(rx_pin) = rx {
571 match_iocon!(register, rx_pin.pin_bank(), rx_pin.pin_number(), { 569 rx_pin.pio().modify(|w| {
572 register.modify(|w| { 570 w.set_func(T::rx_pin_func());
573 w.set_func(T::rx_pin_func()); 571 w.set_mode(iocon::vals::PioMode::INACTIVE);
574 w.set_mode(iocon::vals::PioMode::INACTIVE); 572 w.set_slew(iocon::vals::PioSlew::STANDARD);
575 w.set_slew(iocon::vals::PioSlew::STANDARD); 573 w.set_invert(false);
576 w.set_invert(false); 574 w.set_digimode(iocon::vals::PioDigimode::DIGITAL);
577 w.set_digimode(iocon::vals::PioDigimode::DIGITAL); 575 w.set_od(iocon::vals::PioOd::NORMAL);
578 w.set_od(iocon::vals::PioOd::NORMAL); 576 });
579 });
580 })
581 }; 577 };
582 } 578 }
583 579