1 files changed, 55 insertions, 0 deletions

diff --git a/embassy-rp/src/gpio.rs b/embassy-rp/src/gpio.rs
index af0837f6a..f79bf8948 100644
--- a/embassy-rp/src/gpio.rs
+++ b/embassy-rp/src/gpio.rs
@@ -26,6 +26,7 @@ static QSPI_WAKERS: [AtomicWaker; QSPI_PIN_COUNT] = [const { AtomicWaker::new()
 
 /// Represents a digital input or output level.
 #[derive(Debug, Eq, PartialEq, Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Level {
     /// Logical low.
     Low,
@@ -53,6 +54,7 @@ impl From<Level> for bool {
 
 /// Represents a pull setting for an input.
 #[derive(Debug, Clone, Copy, Eq, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Pull {
     /// No pull.
     None,
@@ -64,6 +66,7 @@ pub enum Pull {
 
 /// Drive strength of an output
 #[derive(Debug, Eq, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Drive {
     /// 2 mA drive.
     _2mA,
@@ -76,6 +79,7 @@ pub enum Drive {
 }
 /// Slew rate of an output
 #[derive(Debug, Eq, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum SlewRate {
     /// Fast slew rate.
     Fast,
@@ -85,6 +89,7 @@ pub enum SlewRate {
 
 /// A GPIO bank with up to 32 pins.
 #[derive(Debug, Eq, PartialEq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum Bank {
     /// Bank 0.
     Bank0 = 0,
@@ -108,6 +113,8 @@ pub struct DormantWakeConfig {
 }
 
 /// GPIO input driver.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Input<'d> {
     pin: Flex<'d>,
 }
@@ -146,6 +153,12 @@ impl<'d> Input<'d> {
         self.pin.get_level()
     }
 
+    /// Configure the input logic inversion of this pin.
+    #[inline]
+    pub fn set_inversion(&mut self, invert: bool) {
+        self.pin.set_input_inversion(invert)
+    }
+
     /// Wait until the pin is high. If it is already high, return immediately.
     #[inline]
     pub async fn wait_for_high(&mut self) {
@@ -352,6 +365,8 @@ impl<'d> Future for InputFuture<'d> {
 }
 
 /// GPIO output driver.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Output<'d> {
     pin: Flex<'d>,
 }
@@ -382,6 +397,12 @@ impl<'d> Output<'d> {
         self.pin.set_slew_rate(slew_rate)
     }
 
+    /// Configure the output logic inversion of this pin.
+    #[inline]
+    pub fn set_inversion(&mut self, invert: bool) {
+        self.pin.set_output_inversion(invert)
+    }
+
     /// Set the output as high.
     #[inline]
     pub fn set_high(&mut self) {
@@ -433,6 +454,8 @@ impl<'d> Output<'d> {
 }
 
 /// GPIO output open-drain.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct OutputOpenDrain<'d> {
     pin: Flex<'d>,
 }
@@ -580,6 +603,8 @@ impl<'d> OutputOpenDrain<'d> {
 /// This pin can be either an input or output pin. The output level register bit will remain
 /// set while not in output mode, so the pin's level will be 'remembered' when it is not in output
 /// mode.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Flex<'d> {
     pin: Peri<'d, AnyPin>,
 }
@@ -685,6 +710,30 @@ impl<'d> Flex<'d> {
         self.pin.sio_oe().value_xor().write_value(self.bit())
     }
 
+    /// Configure the input logic inversion of this pin.
+    #[inline]
+    pub fn set_input_inversion(&mut self, invert: bool) {
+        self.pin.gpio().ctrl().modify(|w| {
+            w.set_inover(if invert {
+                pac::io::vals::Inover::INVERT
+            } else {
+                pac::io::vals::Inover::NORMAL
+            })
+        });
+    }
+
+    /// Configure the output logic inversion of this pin.
+    #[inline]
+    pub fn set_output_inversion(&mut self, invert: bool) {
+        self.pin.gpio().ctrl().modify(|w| {
+            w.set_outover(if invert {
+                pac::io::vals::Outover::INVERT
+            } else {
+                pac::io::vals::Outover::NORMAL
+            })
+        });
+    }
+
     /// Get whether the pin input level is high.
     #[inline]
     pub fn is_high(&self) -> bool {
@@ -815,6 +864,8 @@ impl<'d> Drop for Flex<'d> {
         self.pin.pad_ctrl().write(|_| {});
         self.pin.gpio().ctrl().write(|w| {
             w.set_funcsel(pac::io::vals::Gpio0ctrlFuncsel::NULL as _);
+            w.set_inover(pac::io::vals::Inover::NORMAL);
+            w.set_outover(pac::io::vals::Outover::NORMAL);
         });
         self.pin.io().int_dormant_wake().inte(idx / 8).write_clear(|w| {
             w.set_edge_high(idx % 8, true);
@@ -826,6 +877,8 @@ impl<'d> Drop for Flex<'d> {
 }
 
 /// Dormant wake driver.
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct DormantWake<'w> {
     pin: Peri<'w, AnyPin>,
     cfg: DormantWakeConfig,
@@ -932,6 +985,8 @@ pub trait Pin: PeripheralType + Into<AnyPin> + SealedPin + Sized + 'static {
 }
 
 /// Type-erased GPIO pin
+#[derive(Debug)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct AnyPin {
     pin_bank: u8,
 }