1 files changed, 158 insertions, 146 deletions

diff --git a/embassy-rp/src/uart/buffered.rs b/embassy-rp/src/uart/buffered.rs
index da18138b5..02649ad81 100644
--- a/embassy-rp/src/uart/buffered.rs
+++ b/embassy-rp/src/uart/buffered.rs
@@ -34,28 +34,29 @@ impl State {
 }
 
 /// Buffered UART driver.
-pub struct BufferedUart<'d, T: Instance> {
-    pub(crate) rx: BufferedUartRx<'d, T>,
-    pub(crate) tx: BufferedUartTx<'d, T>,
+pub struct BufferedUart {
+    pub(super) rx: BufferedUartRx,
+    pub(super) tx: BufferedUartTx,
 }
 
 /// Buffered UART RX handle.
-pub struct BufferedUartRx<'d, T: Instance> {
-    pub(crate) phantom: PhantomData<&'d mut T>,
+pub struct BufferedUartRx {
+    pub(super) info: &'static Info,
+    pub(super) state: &'static State,
 }
 
 /// Buffered UART TX handle.
-pub struct BufferedUartTx<'d, T: Instance> {
-    pub(crate) phantom: PhantomData<&'d mut T>,
+pub struct BufferedUartTx {
+    pub(super) info: &'static Info,
+    pub(super) state: &'static State,
 }
 
-pub(crate) fn init_buffers<'d, T: Instance + 'd>(
-    _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+pub(super) fn init_buffers<'d>(
+    info: &Info,
+    state: &State,
     tx_buffer: Option<&'d mut [u8]>,
     rx_buffer: Option<&'d mut [u8]>,
 ) {
-    let state = T::buffered_state();
-
     if let Some(tx_buffer) = tx_buffer {
         let len = tx_buffer.len();
         unsafe { state.tx_buf.init(tx_buffer.as_mut_ptr(), len) };
@@ -76,61 +77,73 @@ pub(crate) fn init_buffers<'d, T: Instance + 'd>(
     // This means we can leave the interrupt enabled the whole time as long as
     // we clear it after it happens. The downside is that the we manually have
     // to pend the ISR when we want data transmission to start.
-    let regs = T::regs();
-    regs.uartimsc().write(|w| {
+    info.regs.uartimsc().write(|w| {
         w.set_rxim(true);
         w.set_rtim(true);
         w.set_txim(true);
     });
 
-    T::Interrupt::unpend();
-    unsafe { T::Interrupt::enable() };
+    info.interrupt.unpend();
+    unsafe { info.interrupt.enable() };
 }
 
-impl<'d, T: Instance> BufferedUart<'d, T> {
+impl BufferedUart {
     /// Create a buffered UART instance.
-    pub fn new(
+    pub fn new<'d, T: Instance>(
         _uart: Peri<'d, T>,
         tx: Peri<'d, impl TxPin<T>>,
         rx: Peri<'d, impl RxPin<T>>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         tx_buffer: &'d mut [u8],
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(Some(tx.into()), Some(rx.into()), None, None, config);
-        init_buffers::<T>(irq, Some(tx_buffer), Some(rx_buffer));
+        super::Uart::<'d, Async>::init(T::info(), Some(tx.into()), Some(rx.into()), None, None, config);
+        init_buffers(T::info(), T::buffered_state(), Some(tx_buffer), Some(rx_buffer));
 
         Self {
-            rx: BufferedUartRx { phantom: PhantomData },
-            tx: BufferedUartTx { phantom: PhantomData },
+            rx: BufferedUartRx {
+                info: T::info(),
+                state: T::buffered_state(),
+            },
+            tx: BufferedUartTx {
+                info: T::info(),
+                state: T::buffered_state(),
+            },
         }
     }
 
     /// Create a buffered UART instance with flow control.
-    pub fn new_with_rtscts(
+    pub fn new_with_rtscts<'d, T: Instance>(
         _uart: Peri<'d, T>,
         tx: Peri<'d, impl TxPin<T>>,
         rx: Peri<'d, impl RxPin<T>>,
         rts: Peri<'d, impl RtsPin<T>>,
         cts: Peri<'d, impl CtsPin<T>>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         tx_buffer: &'d mut [u8],
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(
+        super::Uart::<'d, Async>::init(
+            T::info(),
             Some(tx.into()),
             Some(rx.into()),
             Some(rts.into()),
             Some(cts.into()),
             config,
         );
-        init_buffers::<T>(irq, Some(tx_buffer), Some(rx_buffer));
+        init_buffers(T::info(), T::buffered_state(), Some(tx_buffer), Some(rx_buffer));
 
         Self {
-            rx: BufferedUartRx { phantom: PhantomData },
-            tx: BufferedUartTx { phantom: PhantomData },
+            rx: BufferedUartRx {
+                info: T::info(),
+                state: T::buffered_state(),
+            },
+            tx: BufferedUartTx {
+                info: T::info(),
+                state: T::buffered_state(),
+            },
         }
     }
 
@@ -160,68 +173,75 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
     }
 
     /// sets baudrate on runtime
-    pub fn set_baudrate(&mut self, baudrate: u32) {
-        super::Uart::<'d, T, Async>::set_baudrate_inner(baudrate);
+    pub fn set_baudrate<'d>(&mut self, baudrate: u32) {
+        super::Uart::<'d, Async>::set_baudrate_inner(self.rx.info, baudrate);
     }
 
     /// Split into separate RX and TX handles.
-    pub fn split(self) -> (BufferedUartTx<'d, T>, BufferedUartRx<'d, T>) {
+    pub fn split(self) -> (BufferedUartTx, BufferedUartRx) {
         (self.tx, self.rx)
     }
 
     /// Split the Uart into a transmitter and receiver by mutable reference,
     /// which is particularly useful when having two tasks correlating to
     /// transmitting and receiving.
-    pub fn split_ref(&mut self) -> (&mut BufferedUartTx<'d, T>, &mut BufferedUartRx<'d, T>) {
+    pub fn split_ref(&mut self) -> (&mut BufferedUartTx, &mut BufferedUartRx) {
         (&mut self.tx, &mut self.rx)
     }
 }
 
-impl<'d, T: Instance> BufferedUartRx<'d, T> {
+impl BufferedUartRx {
     /// Create a new buffered UART RX.
-    pub fn new(
+    pub fn new<'d, T: Instance>(
         _uart: Peri<'d, T>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         rx: Peri<'d, impl RxPin<T>>,
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(None, Some(rx.into()), None, None, config);
-        init_buffers::<T>(irq, None, Some(rx_buffer));
+        super::Uart::<'d, Async>::init(T::info(), None, Some(rx.into()), None, None, config);
+        init_buffers(T::info(), T::buffered_state(), None, Some(rx_buffer));
 
-        Self { phantom: PhantomData }
+        Self {
+            info: T::info(),
+            state: T::buffered_state(),
+        }
     }
 
     /// Create a new buffered UART RX with flow control.
-    pub fn new_with_rts(
+    pub fn new_with_rts<'d, T: Instance>(
         _uart: Peri<'d, T>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         rx: Peri<'d, impl RxPin<T>>,
         rts: Peri<'d, impl RtsPin<T>>,
         rx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(None, Some(rx.into()), Some(rts.into()), None, config);
-        init_buffers::<T>(irq, None, Some(rx_buffer));
+        super::Uart::<'d, Async>::init(T::info(), None, Some(rx.into()), Some(rts.into()), None, config);
+        init_buffers(T::info(), T::buffered_state(), None, Some(rx_buffer));
 
-        Self { phantom: PhantomData }
+        Self {
+            info: T::info(),
+            state: T::buffered_state(),
+        }
     }
 
-    fn read<'a>(buf: &'a mut [u8]) -> impl Future<Output = Result<usize, Error>> + 'a
-    where
-        T: 'd,
-    {
+    fn read<'a>(
+        info: &'static Info,
+        state: &'static State,
+        buf: &'a mut [u8],
+    ) -> impl Future<Output = Result<usize, Error>> + 'a {
         poll_fn(move |cx| {
-            if let Poll::Ready(r) = Self::try_read(buf) {
+            if let Poll::Ready(r) = Self::try_read(info, state, buf) {
                 return Poll::Ready(r);
             }
-            T::buffered_state().rx_waker.register(cx.waker());
+            state.rx_waker.register(cx.waker());
             Poll::Pending
         })
     }
 
-    fn get_rx_error() -> Option<Error> {
-        let errs = T::buffered_state().rx_error.swap(0, Ordering::Relaxed);
+    fn get_rx_error(state: &State) -> Option<Error> {
+        let errs = state.rx_error.swap(0, Ordering::Relaxed);
         if errs & RXE_OVERRUN != 0 {
             Some(Error::Overrun)
         } else if errs & RXE_BREAK != 0 {
@@ -235,15 +255,11 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
         }
     }
 
-    fn try_read(buf: &mut [u8]) -> Poll<Result<usize, Error>>
-    where
-        T: 'd,
-    {
+    fn try_read(info: &Info, state: &State, buf: &mut [u8]) -> Poll<Result<usize, Error>> {
         if buf.is_empty() {
             return Poll::Ready(Ok(0));
         }
 
-        let state = T::buffered_state();
         let mut rx_reader = unsafe { state.rx_buf.reader() };
         let n = rx_reader.pop(|data| {
             let n = data.len().min(buf.len());
@@ -252,7 +268,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
         });
 
         let result = if n == 0 {
-            match Self::get_rx_error() {
+            match Self::get_rx_error(state) {
                 None => return Poll::Pending,
                 Some(e) => Err(e),
             }
@@ -262,8 +278,7 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
 
         // (Re-)Enable the interrupt to receive more data in case it was
         // disabled because the buffer was full or errors were detected.
-        let regs = T::regs();
-        regs.uartimsc().write_set(|w| {
+        info.regs.uartimsc().write_set(|w| {
             w.set_rxim(true);
             w.set_rtim(true);
         });
@@ -274,23 +289,19 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
     /// Read from UART RX buffer blocking execution until done.
     pub fn blocking_read(&mut self, buf: &mut [u8]) -> Result<usize, Error> {
         loop {
-            match Self::try_read(buf) {
+            match Self::try_read(self.info, self.state, buf) {
                 Poll::Ready(res) => return res,
                 Poll::Pending => continue,
             }
         }
     }
 
-    fn fill_buf<'a>() -> impl Future<Output = Result<&'a [u8], Error>>
-    where
-        T: 'd,
-    {
+    fn fill_buf<'a>(state: &'static State) -> impl Future<Output = Result<&'a [u8], Error>> {
         poll_fn(move |cx| {
-            let state = T::buffered_state();
             let mut rx_reader = unsafe { state.rx_buf.reader() };
             let (p, n) = rx_reader.pop_buf();
             let result = if n == 0 {
-                match Self::get_rx_error() {
+                match Self::get_rx_error(state) {
                     None => {
                         state.rx_waker.register(cx.waker());
                         return Poll::Pending;
@@ -306,64 +317,70 @@ impl<'d, T: Instance> BufferedUartRx<'d, T> {
         })
     }
 
-    fn consume(amt: usize) {
-        let state = T::buffered_state();
+    fn consume(info: &Info, state: &State, amt: usize) {
         let mut rx_reader = unsafe { state.rx_buf.reader() };
         rx_reader.pop_done(amt);
 
         // (Re-)Enable the interrupt to receive more data in case it was
         // disabled because the buffer was full or errors were detected.
-        let regs = T::regs();
-        regs.uartimsc().write_set(|w| {
+        info.regs.uartimsc().write_set(|w| {
             w.set_rxim(true);
             w.set_rtim(true);
         });
     }
 
     /// we are ready to read if there is data in the buffer
-    fn read_ready() -> Result<bool, Error> {
-        let state = T::buffered_state();
+    fn read_ready(state: &State) -> Result<bool, Error> {
         Ok(!state.rx_buf.is_empty())
     }
 }
 
-impl<'d, T: Instance> BufferedUartTx<'d, T> {
+impl BufferedUartTx {
     /// Create a new buffered UART TX.
-    pub fn new(
+    pub fn new<'d, T: Instance>(
         _uart: Peri<'d, T>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         tx: Peri<'d, impl TxPin<T>>,
         tx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(Some(tx.into()), None, None, None, config);
-        init_buffers::<T>(irq, Some(tx_buffer), None);
+        super::Uart::<'d, Async>::init(T::info(), Some(tx.into()), None, None, None, config);
+        init_buffers(T::info(), T::buffered_state(), Some(tx_buffer), None);
 
-        Self { phantom: PhantomData }
+        Self {
+            info: T::info(),
+            state: T::buffered_state(),
+        }
     }
 
     /// Create a new buffered UART TX with flow control.
-    pub fn new_with_cts(
+    pub fn new_with_cts<'d, T: Instance>(
         _uart: Peri<'d, T>,
-        irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
+        _irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
         tx: Peri<'d, impl TxPin<T>>,
         cts: Peri<'d, impl CtsPin<T>>,
         tx_buffer: &'d mut [u8],
         config: Config,
     ) -> Self {
-        super::Uart::<'d, T, Async>::init(Some(tx.into()), None, None, Some(cts.into()), config);
-        init_buffers::<T>(irq, Some(tx_buffer), None);
+        super::Uart::<'d, Async>::init(T::info(), Some(tx.into()), None, None, Some(cts.into()), config);
+        init_buffers(T::info(), T::buffered_state(), Some(tx_buffer), None);
 
-        Self { phantom: PhantomData }
+        Self {
+            info: T::info(),
+            state: T::buffered_state(),
+        }
     }
 
-    fn write(buf: &[u8]) -> impl Future<Output = Result<usize, Error>> + '_ {
+    fn write<'d>(
+        info: &'static Info,
+        state: &'static State,
+        buf: &'d [u8],
+    ) -> impl Future<Output = Result<usize, Error>> + 'd {
         poll_fn(move |cx| {
             if buf.is_empty() {
                 return Poll::Ready(Ok(0));
             }
 
-            let state = T::buffered_state();
             let mut tx_writer = unsafe { state.tx_buf.writer() };
             let n = tx_writer.push(|data| {
                 let n = data.len().min(buf.len());
@@ -379,14 +396,13 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
             // FIFO and the number of bytes drops below a threshold. When the
             // FIFO was empty we have to manually pend the interrupt to shovel
             // TX data from the buffer into the FIFO.
-            T::Interrupt::pend();
+            info.interrupt.pend();
             Poll::Ready(Ok(n))
         })
     }
 
-    fn flush() -> impl Future<Output = Result<(), Error>> {
+    fn flush(state: &'static State) -> impl Future<Output = Result<(), Error>> {
         poll_fn(move |cx| {
-            let state = T::buffered_state();
             if !state.tx_buf.is_empty() {
                 state.tx_waker.register(cx.waker());
                 return Poll::Pending;
@@ -403,8 +419,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
         }
 
         loop {
-            let state = T::buffered_state();
-            let mut tx_writer = unsafe { state.tx_buf.writer() };
+            let mut tx_writer = unsafe { self.state.tx_buf.writer() };
             let n = tx_writer.push(|data| {
                 let n = data.len().min(buf.len());
                 data[..n].copy_from_slice(&buf[..n]);
@@ -416,7 +431,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
                 // FIFO and the number of bytes drops below a threshold. When the
                 // FIFO was empty we have to manually pend the interrupt to shovel
                 // TX data from the buffer into the FIFO.
-                T::Interrupt::pend();
+                self.info.interrupt.pend();
                 return Ok(n);
             }
         }
@@ -425,8 +440,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
     /// Flush UART TX blocking execution until done.
     pub fn blocking_flush(&mut self) -> Result<(), Error> {
         loop {
-            let state = T::buffered_state();
-            if state.tx_buf.is_empty() {
+            if self.state.tx_buf.is_empty() {
                 return Ok(());
             }
         }
@@ -434,7 +448,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
 
     /// Check if UART is busy.
     pub fn busy(&self) -> bool {
-        T::regs().uartfr().read().busy()
+        self.info.regs.uartfr().read().busy()
     }
 
     /// Assert a break condition after waiting for the transmit buffers to empty,
@@ -445,7 +459,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
     /// This method may block for a long amount of time since it has to wait
     /// for the transmit fifo to empty, which may take a while on slow links.
     pub async fn send_break(&mut self, bits: u32) {
-        let regs = T::regs();
+        let regs = self.info.regs;
         let bits = bits.max({
             let lcr = regs.uartlcr_h().read();
             let width = lcr.wlen() as u32 + 5;
@@ -458,7 +472,7 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
         let div_clk = clk_peri_freq() as u64 * 64;
         let wait_usecs = (1_000_000 * bits as u64 * divx64 * 16 + div_clk - 1) / div_clk;
 
-        Self::flush().await.unwrap();
+        Self::flush(self.state).await.unwrap();
         while self.busy() {}
         regs.uartlcr_h().write_set(|w| w.set_brk(true));
         Timer::after_micros(wait_usecs).await;
@@ -466,28 +480,26 @@ impl<'d, T: Instance> BufferedUartTx<'d, T> {
     }
 }
 
-impl<'d, T: Instance> Drop for BufferedUartRx<'d, T> {
+impl Drop for BufferedUartRx {
     fn drop(&mut self) {
-        let state = T::buffered_state();
-        unsafe { state.rx_buf.deinit() }
+        unsafe { self.state.rx_buf.deinit() }
 
         // TX is inactive if the buffer is not available.
         // We can now unregister the interrupt handler
-        if !state.tx_buf.is_available() {
-            T::Interrupt::disable();
+        if !self.state.tx_buf.is_available() {
+            self.info.interrupt.disable();
         }
     }
 }
 
-impl<'d, T: Instance> Drop for BufferedUartTx<'d, T> {
+impl Drop for BufferedUartTx {
     fn drop(&mut self) {
-        let state = T::buffered_state();
-        unsafe { state.tx_buf.deinit() }
+        unsafe { self.state.tx_buf.deinit() }
 
         // RX is inactive if the buffer is not available.
         // We can now unregister the interrupt handler
-        if !state.rx_buf.is_available() {
-            T::Interrupt::disable();
+        if !self.state.rx_buf.is_available() {
+            self.info.interrupt.disable();
         }
     }
 }
@@ -499,7 +511,7 @@ pub struct BufferedInterruptHandler<T: Instance> {
 
 impl<T: Instance> interrupt::typelevel::Handler<T::Interrupt> for BufferedInterruptHandler<T> {
     unsafe fn on_interrupt() {
-        let r = T::regs();
+        let r = T::info().regs;
         if r.uartdmacr().read().rxdmae() {
             return;
         }
@@ -603,95 +615,95 @@ impl embedded_io::Error for Error {
     }
 }
 
-impl<'d, T: Instance> embedded_io_async::ErrorType for BufferedUart<'d, T> {
+impl embedded_io_async::ErrorType for BufferedUart {
     type Error = Error;
 }
 
-impl<'d, T: Instance> embedded_io_async::ErrorType for BufferedUartRx<'d, T> {
+impl embedded_io_async::ErrorType for BufferedUartRx {
     type Error = Error;
 }
 
-impl<'d, T: Instance> embedded_io_async::ErrorType for BufferedUartTx<'d, T> {
+impl embedded_io_async::ErrorType for BufferedUartTx {
     type Error = Error;
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::Read for BufferedUart<'d, T> {
+impl embedded_io_async::Read for BufferedUart {
     async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
-        BufferedUartRx::<'d, T>::read(buf).await
+        BufferedUartRx::read(self.rx.info, self.rx.state, buf).await
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::Read for BufferedUartRx<'d, T> {
+impl embedded_io_async::Read for BufferedUartRx {
     async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
-        Self::read(buf).await
+        Self::read(self.info, self.state, buf).await
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::ReadReady for BufferedUart<'d, T> {
+impl embedded_io_async::ReadReady for BufferedUart {
     fn read_ready(&mut self) -> Result<bool, Self::Error> {
-        BufferedUartRx::<'d, T>::read_ready()
+        BufferedUartRx::read_ready(self.rx.state)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::ReadReady for BufferedUartRx<'d, T> {
+impl embedded_io_async::ReadReady for BufferedUartRx {
     fn read_ready(&mut self) -> Result<bool, Self::Error> {
-        Self::read_ready()
+        Self::read_ready(self.state)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::BufRead for BufferedUart<'d, T> {
+impl embedded_io_async::BufRead for BufferedUart {
     async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
-        BufferedUartRx::<'d, T>::fill_buf().await
+        BufferedUartRx::fill_buf(self.rx.state).await
     }
 
     fn consume(&mut self, amt: usize) {
-        BufferedUartRx::<'d, T>::consume(amt)
+        BufferedUartRx::consume(self.rx.info, self.rx.state, amt)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::BufRead for BufferedUartRx<'d, T> {
+impl embedded_io_async::BufRead for BufferedUartRx {
     async fn fill_buf(&mut self) -> Result<&[u8], Self::Error> {
-        Self::fill_buf().await
+        Self::fill_buf(self.state).await
     }
 
     fn consume(&mut self, amt: usize) {
-        Self::consume(amt)
+        Self::consume(self.info, self.state, amt)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::Write for BufferedUart<'d, T> {
+impl embedded_io_async::Write for BufferedUart {
     async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
-        BufferedUartTx::<'d, T>::write(buf).await
+        BufferedUartTx::write(self.tx.info, self.tx.state, buf).await
     }
 
     async fn flush(&mut self) -> Result<(), Self::Error> {
-        BufferedUartTx::<'d, T>::flush().await
+        BufferedUartTx::flush(self.tx.state).await
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io_async::Write for BufferedUartTx<'d, T> {
+impl embedded_io_async::Write for BufferedUartTx {
     async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
-        Self::write(buf).await
+        Self::write(self.info, self.state, buf).await
     }
 
     async fn flush(&mut self) -> Result<(), Self::Error> {
-        Self::flush().await
+        Self::flush(self.state).await
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io::Read for BufferedUart<'d, T> {
+impl embedded_io::Read for BufferedUart {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
         self.rx.blocking_read(buf)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io::Read for BufferedUartRx<'d, T> {
+impl embedded_io::Read for BufferedUartRx {
     fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
         self.blocking_read(buf)
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io::Write for BufferedUart<'d, T> {
+impl embedded_io::Write for BufferedUart {
     fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
         self.tx.blocking_write(buf)
     }
@@ -701,7 +713,7 @@ impl<'d, T: Instance + 'd> embedded_io::Write for BufferedUart<'d, T> {
     }
 }
 
-impl<'d, T: Instance + 'd> embedded_io::Write for BufferedUartTx<'d, T> {
+impl embedded_io::Write for BufferedUartTx {
     fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
         self.blocking_write(buf)
     }
@@ -711,11 +723,11 @@ impl<'d, T: Instance + 'd> embedded_io::Write for BufferedUartTx<'d, T> {
     }
 }
 
-impl<'d, T: Instance> embedded_hal_02::serial::Read<u8> for BufferedUartRx<'d, T> {
+impl embedded_hal_02::serial::Read<u8> for BufferedUartRx {
     type Error = Error;
 
     fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
-        let r = T::regs();
+        let r = self.info.regs;
         if r.uartfr().read().rxfe() {
             return Err(nb::Error::WouldBlock);
         }
@@ -736,7 +748,7 @@ impl<'d, T: Instance> embedded_hal_02::serial::Read<u8> for BufferedUartRx<'d, T
     }
 }
 
-impl<'d, T: Instance> embedded_hal_02::blocking::serial::Write<u8> for BufferedUartTx<'d, T> {
+impl embedded_hal_02::blocking::serial::Write<u8> for BufferedUartTx {
     type Error = Error;
 
     fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> {
@@ -755,7 +767,7 @@ impl<'d, T: Instance> embedded_hal_02::blocking::serial::Write<u8> for BufferedU
     }
 }
 
-impl<'d, T: Instance> embedded_hal_02::serial::Read<u8> for BufferedUart<'d, T> {
+impl embedded_hal_02::serial::Read<u8> for BufferedUart {
     type Error = Error;
 
     fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
@@ -763,7 +775,7 @@ impl<'d, T: Instance> embedded_hal_02::serial::Read<u8> for BufferedUart<'d, T>
     }
 }
 
-impl<'d, T: Instance> embedded_hal_02::blocking::serial::Write<u8> for BufferedUart<'d, T> {
+impl embedded_hal_02::blocking::serial::Write<u8> for BufferedUart {
     type Error = Error;
 
     fn bwrite_all(&mut self, mut buffer: &[u8]) -> Result<(), Self::Error> {
@@ -782,25 +794,25 @@ impl<'d, T: Instance> embedded_hal_02::blocking::serial::Write<u8> for BufferedU
     }
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::ErrorType for BufferedUartRx<'d, T> {
+impl embedded_hal_nb::serial::ErrorType for BufferedUartRx {
     type Error = Error;
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::ErrorType for BufferedUartTx<'d, T> {
+impl embedded_hal_nb::serial::ErrorType for BufferedUartTx {
     type Error = Error;
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::ErrorType for BufferedUart<'d, T> {
+impl embedded_hal_nb::serial::ErrorType for BufferedUart {
     type Error = Error;
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::Read for BufferedUartRx<'d, T> {
+impl embedded_hal_nb::serial::Read for BufferedUartRx {
     fn read(&mut self) -> nb::Result<u8, Self::Error> {
         embedded_hal_02::serial::Read::read(self)
     }
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::Write for BufferedUartTx<'d, T> {
+impl embedded_hal_nb::serial::Write for BufferedUartTx {
     fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> {
         self.blocking_write(&[char]).map(drop).map_err(nb::Error::Other)
     }
@@ -810,13 +822,13 @@ impl<'d, T: Instance> embedded_hal_nb::serial::Write for BufferedUartTx<'d, T> {
     }
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::Read for BufferedUart<'d, T> {
+impl embedded_hal_nb::serial::Read for BufferedUart {
     fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> {
         embedded_hal_02::serial::Read::read(&mut self.rx)
     }
 }
 
-impl<'d, T: Instance> embedded_hal_nb::serial::Write for BufferedUart<'d, T> {
+impl embedded_hal_nb::serial::Write for BufferedUart {
     fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> {
         self.blocking_write(&[char]).map(drop).map_err(nb::Error::Other)
     }