diff options
Diffstat (limited to 'embassy-rp/src/uart/mod.rs')
| -rw-r--r-- | embassy-rp/src/uart/mod.rs | 244 |
1 files changed, 114 insertions, 130 deletions
diff --git a/embassy-rp/src/uart/mod.rs b/embassy-rp/src/uart/mod.rs index 461986c81..18705b141 100644 --- a/embassy-rp/src/uart/mod.rs +++ b/embassy-rp/src/uart/mod.rs | |||
| @@ -17,9 +17,7 @@ use crate::interrupt::typelevel::{Binding, Interrupt}; | |||
| 17 | use crate::pac::io::vals::{Inover, Outover}; | 17 | use crate::pac::io::vals::{Inover, Outover}; |
| 18 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; | 18 | use crate::{interrupt, pac, peripherals, Peripheral, RegExt}; |
| 19 | 19 | ||
| 20 | #[cfg(feature = "nightly")] | ||
| 21 | mod buffered; | 20 | mod buffered; |
| 22 | #[cfg(feature = "nightly")] | ||
| 23 | pub use buffered::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, BufferedUartTx}; | 21 | pub use buffered::{BufferedInterruptHandler, BufferedUart, BufferedUartRx, BufferedUartTx}; |
| 24 | 22 | ||
| 25 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] | 23 | #[derive(Clone, Copy, PartialEq, Eq, Debug)] |
| @@ -193,7 +191,6 @@ impl<'d, T: Instance, M: Mode> UartTx<'d, T, M> { | |||
| 193 | } | 191 | } |
| 194 | 192 | ||
| 195 | impl<'d, T: Instance> UartTx<'d, T, Blocking> { | 193 | impl<'d, T: Instance> UartTx<'d, T, Blocking> { |
| 196 | #[cfg(feature = "nightly")] | ||
| 197 | pub fn into_buffered( | 194 | pub fn into_buffered( |
| 198 | self, | 195 | self, |
| 199 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, | 196 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, |
| @@ -307,7 +304,6 @@ impl<'d, T: Instance> UartRx<'d, T, Blocking> { | |||
| 307 | Self::new_inner(false, None) | 304 | Self::new_inner(false, None) |
| 308 | } | 305 | } |
| 309 | 306 | ||
| 310 | #[cfg(feature = "nightly")] | ||
| 311 | pub fn into_buffered( | 307 | pub fn into_buffered( |
| 312 | self, | 308 | self, |
| 313 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, | 309 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, |
| @@ -462,7 +458,6 @@ impl<'d, T: Instance> Uart<'d, T, Blocking> { | |||
| 462 | ) | 458 | ) |
| 463 | } | 459 | } |
| 464 | 460 | ||
| 465 | #[cfg(feature = "nightly")] | ||
| 466 | pub fn into_buffered( | 461 | pub fn into_buffered( |
| 467 | self, | 462 | self, |
| 468 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, | 463 | irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>, |
| @@ -709,172 +704,163 @@ impl<'d, T: Instance> Uart<'d, T, Async> { | |||
| 709 | } | 704 | } |
| 710 | } | 705 | } |
| 711 | 706 | ||
| 712 | mod eh02 { | 707 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Read<u8> for UartRx<'d, T, M> { |
| 713 | use super::*; | 708 | type Error = Error; |
| 714 | 709 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { | |
| 715 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Read<u8> for UartRx<'d, T, M> { | 710 | let r = T::regs(); |
| 716 | type Error = Error; | 711 | if r.uartfr().read().rxfe() { |
| 717 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { | 712 | return Err(nb::Error::WouldBlock); |
| 718 | let r = T::regs(); | 713 | } |
| 719 | if r.uartfr().read().rxfe() { | ||
| 720 | return Err(nb::Error::WouldBlock); | ||
| 721 | } | ||
| 722 | 714 | ||
| 723 | let dr = r.uartdr().read(); | 715 | let dr = r.uartdr().read(); |
| 724 | 716 | ||
| 725 | if dr.oe() { | 717 | if dr.oe() { |
| 726 | Err(nb::Error::Other(Error::Overrun)) | 718 | Err(nb::Error::Other(Error::Overrun)) |
| 727 | } else if dr.be() { | 719 | } else if dr.be() { |
| 728 | Err(nb::Error::Other(Error::Break)) | 720 | Err(nb::Error::Other(Error::Break)) |
| 729 | } else if dr.pe() { | 721 | } else if dr.pe() { |
| 730 | Err(nb::Error::Other(Error::Parity)) | 722 | Err(nb::Error::Other(Error::Parity)) |
| 731 | } else if dr.fe() { | 723 | } else if dr.fe() { |
| 732 | Err(nb::Error::Other(Error::Framing)) | 724 | Err(nb::Error::Other(Error::Framing)) |
| 733 | } else { | 725 | } else { |
| 734 | Ok(dr.data()) | 726 | Ok(dr.data()) |
| 735 | } | ||
| 736 | } | 727 | } |
| 737 | } | 728 | } |
| 729 | } | ||
| 738 | 730 | ||
| 739 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for UartTx<'d, T, M> { | 731 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for UartTx<'d, T, M> { |
| 740 | type Error = Error; | 732 | type Error = Error; |
| 741 | |||
| 742 | fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> { | ||
| 743 | let r = T::regs(); | ||
| 744 | if r.uartfr().read().txff() { | ||
| 745 | return Err(nb::Error::WouldBlock); | ||
| 746 | } | ||
| 747 | 733 | ||
| 748 | r.uartdr().write(|w| w.set_data(word)); | 734 | fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> { |
| 749 | Ok(()) | 735 | let r = T::regs(); |
| 736 | if r.uartfr().read().txff() { | ||
| 737 | return Err(nb::Error::WouldBlock); | ||
| 750 | } | 738 | } |
| 751 | 739 | ||
| 752 | fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> { | 740 | r.uartdr().write(|w| w.set_data(word)); |
| 753 | let r = T::regs(); | 741 | Ok(()) |
| 754 | if !r.uartfr().read().txfe() { | ||
| 755 | return Err(nb::Error::WouldBlock); | ||
| 756 | } | ||
| 757 | Ok(()) | ||
| 758 | } | ||
| 759 | } | 742 | } |
| 760 | 743 | ||
| 761 | impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for UartTx<'d, T, M> { | 744 | fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> { |
| 762 | type Error = Error; | 745 | let r = T::regs(); |
| 763 | 746 | if !r.uartfr().read().txfe() { | |
| 764 | fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { | 747 | return Err(nb::Error::WouldBlock); |
| 765 | self.blocking_write(buffer) | ||
| 766 | } | ||
| 767 | |||
| 768 | fn bflush(&mut self) -> Result<(), Self::Error> { | ||
| 769 | self.blocking_flush() | ||
| 770 | } | 748 | } |
| 749 | Ok(()) | ||
| 771 | } | 750 | } |
| 751 | } | ||
| 772 | 752 | ||
| 773 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Read<u8> for Uart<'d, T, M> { | 753 | impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for UartTx<'d, T, M> { |
| 774 | type Error = Error; | 754 | type Error = Error; |
| 775 | 755 | ||
| 776 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { | 756 | fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { |
| 777 | embedded_hal_02::serial::Read::read(&mut self.rx) | 757 | self.blocking_write(buffer) |
| 778 | } | ||
| 779 | } | 758 | } |
| 780 | 759 | ||
| 781 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for Uart<'d, T, M> { | 760 | fn bflush(&mut self) -> Result<(), Self::Error> { |
| 782 | type Error = Error; | 761 | self.blocking_flush() |
| 762 | } | ||
| 763 | } | ||
| 783 | 764 | ||
| 784 | fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> { | 765 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Read<u8> for Uart<'d, T, M> { |
| 785 | embedded_hal_02::serial::Write::write(&mut self.tx, word) | 766 | type Error = Error; |
| 786 | } | ||
| 787 | 767 | ||
| 788 | fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> { | 768 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { |
| 789 | embedded_hal_02::serial::Write::flush(&mut self.tx) | 769 | embedded_hal_02::serial::Read::read(&mut self.rx) |
| 790 | } | ||
| 791 | } | 770 | } |
| 771 | } | ||
| 792 | 772 | ||
| 793 | impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for Uart<'d, T, M> { | 773 | impl<'d, T: Instance, M: Mode> embedded_hal_02::serial::Write<u8> for Uart<'d, T, M> { |
| 794 | type Error = Error; | 774 | type Error = Error; |
| 795 | 775 | ||
| 796 | fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { | 776 | fn write(&mut self, word: u8) -> Result<(), nb::Error<Self::Error>> { |
| 797 | self.blocking_write(buffer) | 777 | embedded_hal_02::serial::Write::write(&mut self.tx, word) |
| 798 | } | 778 | } |
| 799 | 779 | ||
| 800 | fn bflush(&mut self) -> Result<(), Self::Error> { | 780 | fn flush(&mut self) -> Result<(), nb::Error<Self::Error>> { |
| 801 | self.blocking_flush() | 781 | embedded_hal_02::serial::Write::flush(&mut self.tx) |
| 802 | } | ||
| 803 | } | 782 | } |
| 804 | } | 783 | } |
| 805 | 784 | ||
| 806 | #[cfg(feature = "unstable-traits")] | 785 | impl<'d, T: Instance, M: Mode> embedded_hal_02::blocking::serial::Write<u8> for Uart<'d, T, M> { |
| 807 | mod eh1 { | 786 | type Error = Error; |
| 808 | use super::*; | ||
| 809 | 787 | ||
| 810 | impl embedded_hal_nb::serial::Error for Error { | 788 | fn bwrite_all(&mut self, buffer: &[u8]) -> Result<(), Self::Error> { |
| 811 | fn kind(&self) -> embedded_hal_nb::serial::ErrorKind { | 789 | self.blocking_write(buffer) |
| 812 | match *self { | ||
| 813 | Self::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat, | ||
| 814 | Self::Break => embedded_hal_nb::serial::ErrorKind::Other, | ||
| 815 | Self::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun, | ||
| 816 | Self::Parity => embedded_hal_nb::serial::ErrorKind::Parity, | ||
| 817 | } | ||
| 818 | } | ||
| 819 | } | 790 | } |
| 820 | 791 | ||
| 821 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for UartRx<'d, T, M> { | 792 | fn bflush(&mut self) -> Result<(), Self::Error> { |
| 822 | type Error = Error; | 793 | self.blocking_flush() |
| 823 | } | 794 | } |
| 795 | } | ||
| 824 | 796 | ||
| 825 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for UartTx<'d, T, M> { | 797 | impl embedded_hal_nb::serial::Error for Error { |
| 826 | type Error = Error; | 798 | fn kind(&self) -> embedded_hal_nb::serial::ErrorKind { |
| 799 | match *self { | ||
| 800 | Self::Framing => embedded_hal_nb::serial::ErrorKind::FrameFormat, | ||
| 801 | Self::Break => embedded_hal_nb::serial::ErrorKind::Other, | ||
| 802 | Self::Overrun => embedded_hal_nb::serial::ErrorKind::Overrun, | ||
| 803 | Self::Parity => embedded_hal_nb::serial::ErrorKind::Parity, | ||
| 804 | } | ||
| 827 | } | 805 | } |
| 806 | } | ||
| 828 | 807 | ||
| 829 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for Uart<'d, T, M> { | 808 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for UartRx<'d, T, M> { |
| 830 | type Error = Error; | 809 | type Error = Error; |
| 831 | } | 810 | } |
| 832 | 811 | ||
| 833 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Read for UartRx<'d, T, M> { | 812 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for UartTx<'d, T, M> { |
| 834 | fn read(&mut self) -> nb::Result<u8, Self::Error> { | 813 | type Error = Error; |
| 835 | let r = T::regs(); | 814 | } |
| 836 | let dr = r.uartdr().read(); | ||
| 837 | 815 | ||
| 838 | if dr.oe() { | 816 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::ErrorType for Uart<'d, T, M> { |
| 839 | Err(nb::Error::Other(Error::Overrun)) | 817 | type Error = Error; |
| 840 | } else if dr.be() { | 818 | } |
| 841 | Err(nb::Error::Other(Error::Break)) | 819 | |
| 842 | } else if dr.pe() { | 820 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Read for UartRx<'d, T, M> { |
| 843 | Err(nb::Error::Other(Error::Parity)) | 821 | fn read(&mut self) -> nb::Result<u8, Self::Error> { |
| 844 | } else if dr.fe() { | 822 | let r = T::regs(); |
| 845 | Err(nb::Error::Other(Error::Framing)) | 823 | let dr = r.uartdr().read(); |
| 846 | } else if dr.fe() { | 824 | |
| 847 | Ok(dr.data()) | 825 | if dr.oe() { |
| 848 | } else { | 826 | Err(nb::Error::Other(Error::Overrun)) |
| 849 | Err(nb::Error::WouldBlock) | 827 | } else if dr.be() { |
| 850 | } | 828 | Err(nb::Error::Other(Error::Break)) |
| 829 | } else if dr.pe() { | ||
| 830 | Err(nb::Error::Other(Error::Parity)) | ||
| 831 | } else if dr.fe() { | ||
| 832 | Err(nb::Error::Other(Error::Framing)) | ||
| 833 | } else if dr.fe() { | ||
| 834 | Ok(dr.data()) | ||
| 835 | } else { | ||
| 836 | Err(nb::Error::WouldBlock) | ||
| 851 | } | 837 | } |
| 852 | } | 838 | } |
| 839 | } | ||
| 853 | 840 | ||
| 854 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d, T, M> { | 841 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for UartTx<'d, T, M> { |
| 855 | fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { | 842 | fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { |
| 856 | self.blocking_write(&[char]).map_err(nb::Error::Other) | 843 | self.blocking_write(&[char]).map_err(nb::Error::Other) |
| 857 | } | 844 | } |
| 858 | 845 | ||
| 859 | fn flush(&mut self) -> nb::Result<(), Self::Error> { | 846 | fn flush(&mut self) -> nb::Result<(), Self::Error> { |
| 860 | self.blocking_flush().map_err(nb::Error::Other) | 847 | self.blocking_flush().map_err(nb::Error::Other) |
| 861 | } | ||
| 862 | } | 848 | } |
| 849 | } | ||
| 863 | 850 | ||
| 864 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Read for Uart<'d, T, M> { | 851 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Read for Uart<'d, T, M> { |
| 865 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { | 852 | fn read(&mut self) -> Result<u8, nb::Error<Self::Error>> { |
| 866 | embedded_hal_02::serial::Read::read(&mut self.rx) | 853 | embedded_hal_02::serial::Read::read(&mut self.rx) |
| 867 | } | ||
| 868 | } | 854 | } |
| 855 | } | ||
| 869 | 856 | ||
| 870 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M> { | 857 | impl<'d, T: Instance, M: Mode> embedded_hal_nb::serial::Write for Uart<'d, T, M> { |
| 871 | fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { | 858 | fn write(&mut self, char: u8) -> nb::Result<(), Self::Error> { |
| 872 | self.blocking_write(&[char]).map_err(nb::Error::Other) | 859 | self.blocking_write(&[char]).map_err(nb::Error::Other) |
| 873 | } | 860 | } |
| 874 | 861 | ||
| 875 | fn flush(&mut self) -> nb::Result<(), Self::Error> { | 862 | fn flush(&mut self) -> nb::Result<(), Self::Error> { |
| 876 | self.blocking_flush().map_err(nb::Error::Other) | 863 | self.blocking_flush().map_err(nb::Error::Other) |
| 877 | } | ||
| 878 | } | 864 | } |
| 879 | } | 865 | } |
| 880 | 866 | ||
| @@ -891,7 +877,6 @@ mod sealed { | |||
| 891 | 877 | ||
| 892 | fn regs() -> pac::uart::Uart; | 878 | fn regs() -> pac::uart::Uart; |
| 893 | 879 | ||
| 894 | #[cfg(feature = "nightly")] | ||
| 895 | fn buffered_state() -> &'static buffered::State; | 880 | fn buffered_state() -> &'static buffered::State; |
| 896 | 881 | ||
| 897 | fn dma_state() -> &'static DmaState; | 882 | fn dma_state() -> &'static DmaState; |
| @@ -931,7 +916,6 @@ macro_rules! impl_instance { | |||
| 931 | pac::$inst | 916 | pac::$inst |
| 932 | } | 917 | } |
| 933 | 918 | ||
| 934 | #[cfg(feature = "nightly")] | ||
| 935 | fn buffered_state() -> &'static buffered::State { | 919 | fn buffered_state() -> &'static buffered::State { |
| 936 | static STATE: buffered::State = buffered::State::new(); | 920 | static STATE: buffered::State = buffered::State::new(); |
| 937 | &STATE | 921 | &STATE |
