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-rw-r--r--embassy-stm32-wpan/src/sub/sys.rs3
1 files changed, 2 insertions, 1 deletions
diff --git a/embassy-stm32-wpan/src/sub/sys.rs b/embassy-stm32-wpan/src/sub/sys.rs
index fcc2c651e..cf6df58bf 100644
--- a/embassy-stm32-wpan/src/sub/sys.rs
+++ b/embassy-stm32-wpan/src/sub/sys.rs
@@ -91,7 +91,8 @@ impl Sys {
91 /// 91 ///
92 /// This must be called before any BLE commands are sent via the BLE channel (according to 92 /// This must be called before any BLE commands are sent via the BLE channel (according to
93 /// AN5289, Figures 65 and 66). It should only be called after CPU2 sends a system event, via 93 /// AN5289, Figures 65 and 66). It should only be called after CPU2 sends a system event, via
94 /// `HW_IPCC_SYS_EvtNot`, aka `IoBusCallBackUserEvt` (as detailed in Figure 65), aka [read]. 94 /// `HW_IPCC_SYS_EvtNot`, aka `IoBusCallBackUserEvt` (as detailed in Figure 65), aka
95 /// [crate::sub::ble::hci::host::uart::UartHci::read].
95 #[cfg(feature = "ble")] 96 #[cfg(feature = "ble")]
96 pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> Result<SchiCommandStatus, ()> { 97 pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> Result<SchiCommandStatus, ()> {
97 self.write_and_get_response(ShciOpcode::BleInit, param.payload()).await 98 self.write_and_get_response(ShciOpcode::BleInit, param.payload()).await