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Diffstat (limited to 'embassy-stm32/src/eth/v1')
-rw-r--r--embassy-stm32/src/eth/v1/mod.rs10
1 files changed, 5 insertions, 5 deletions
diff --git a/embassy-stm32/src/eth/v1/mod.rs b/embassy-stm32/src/eth/v1/mod.rs
index a5f1a268d..540cdd027 100644
--- a/embassy-stm32/src/eth/v1/mod.rs
+++ b/embassy-stm32/src/eth/v1/mod.rs
@@ -5,7 +5,6 @@ mod tx_desc;
5 5
6use core::sync::atomic::{fence, Ordering}; 6use core::sync::atomic::{fence, Ordering};
7 7
8use embassy_cortex_m::interrupt::Interrupt;
9use embassy_hal_common::{into_ref, PeripheralRef}; 8use embassy_hal_common::{into_ref, PeripheralRef};
10use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf}; 9use stm32_metapac::eth::vals::{Apcs, Cr, Dm, DmaomrSr, Fes, Ftf, Ifg, MbProgress, Mw, Pbl, Rsf, St, Tsf};
11 10
@@ -14,6 +13,7 @@ pub(crate) use self::tx_desc::{TDes, TDesRing};
14use super::*; 13use super::*;
15use crate::gpio::sealed::{AFType, Pin as __GpioPin}; 14use crate::gpio::sealed::{AFType, Pin as __GpioPin};
16use crate::gpio::AnyPin; 15use crate::gpio::AnyPin;
16use crate::interrupt::InterruptExt;
17#[cfg(eth_v1a)] 17#[cfg(eth_v1a)]
18use crate::pac::AFIO; 18use crate::pac::AFIO;
19#[cfg(any(eth_v1b, eth_v1c))] 19#[cfg(any(eth_v1b, eth_v1c))]
@@ -24,7 +24,7 @@ use crate::{interrupt, Peripheral};
24/// Interrupt handler. 24/// Interrupt handler.
25pub struct InterruptHandler {} 25pub struct InterruptHandler {}
26 26
27impl interrupt::Handler<interrupt::ETH> for InterruptHandler { 27impl interrupt::typelevel::Handler<interrupt::typelevel::ETH> for InterruptHandler {
28 unsafe fn on_interrupt() { 28 unsafe fn on_interrupt() {
29 WAKER.wake(); 29 WAKER.wake();
30 30
@@ -100,7 +100,7 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
100 pub fn new<const TX: usize, const RX: usize>( 100 pub fn new<const TX: usize, const RX: usize>(
101 queue: &'d mut PacketQueue<TX, RX>, 101 queue: &'d mut PacketQueue<TX, RX>,
102 peri: impl Peripheral<P = T> + 'd, 102 peri: impl Peripheral<P = T> + 'd,
103 _irq: impl interrupt::Binding<interrupt::ETH, InterruptHandler> + 'd, 103 _irq: impl interrupt::typelevel::Binding<interrupt::typelevel::ETH, InterruptHandler> + 'd,
104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd, 104 ref_clk: impl Peripheral<P = impl RefClkPin<T>> + 'd,
105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd, 105 mdio: impl Peripheral<P = impl MDIOPin<T>> + 'd,
106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd, 106 mdc: impl Peripheral<P = impl MDCPin<T>> + 'd,
@@ -267,8 +267,8 @@ impl<'d, T: Instance, P: PHY> Ethernet<'d, T, P> {
267 P::phy_reset(&mut this); 267 P::phy_reset(&mut this);
268 P::phy_init(&mut this); 268 P::phy_init(&mut this);
269 269
270 interrupt::ETH::unpend(); 270 interrupt::ETH.unpend();
271 interrupt::ETH::enable(); 271 interrupt::ETH.enable();
272 272
273 this 273 this
274 } 274 }