diff options
Diffstat (limited to 'embassy-stm32/src/ipcc.rs')
| -rw-r--r-- | embassy-stm32/src/ipcc.rs | 66 |
1 files changed, 27 insertions, 39 deletions
diff --git a/embassy-stm32/src/ipcc.rs b/embassy-stm32/src/ipcc.rs index 2b9caf8e5..ea33b32c7 100644 --- a/embassy-stm32/src/ipcc.rs +++ b/embassy-stm32/src/ipcc.rs | |||
| @@ -1,5 +1,3 @@ | |||
| 1 | use embassy_hal_common::{into_ref, Peripheral, PeripheralRef}; | ||
| 2 | |||
| 3 | use crate::ipcc::sealed::Instance; | 1 | use crate::ipcc::sealed::Instance; |
| 4 | use crate::peripherals::IPCC; | 2 | use crate::peripherals::IPCC; |
| 5 | use crate::rcc::sealed::RccPeripheral; | 3 | use crate::rcc::sealed::RccPeripheral; |
| @@ -29,22 +27,10 @@ pub(crate) mod sealed { | |||
| 29 | } | 27 | } |
| 30 | } | 28 | } |
| 31 | 29 | ||
| 32 | pub struct Ipcc<'d> { | 30 | pub(crate) struct Ipcc; |
| 33 | _peri: PeripheralRef<'d, IPCC>, | ||
| 34 | } | ||
| 35 | |||
| 36 | impl<'d> Ipcc<'d> { | ||
| 37 | pub fn new(peri: impl Peripheral<P = IPCC> + 'd, _config: Config) -> Self { | ||
| 38 | Self::new_inner(peri) | ||
| 39 | } | ||
| 40 | |||
| 41 | pub(crate) fn new_inner(peri: impl Peripheral<P = IPCC> + 'd) -> Self { | ||
| 42 | into_ref!(peri); | ||
| 43 | 31 | ||
| 44 | Self { _peri: peri } | 32 | impl Ipcc { |
| 45 | } | 33 | pub(crate) fn init(_config: Config) { |
| 46 | |||
| 47 | pub fn init(&mut self) { | ||
| 48 | IPCC::enable(); | 34 | IPCC::enable(); |
| 49 | IPCC::reset(); | 35 | IPCC::reset(); |
| 50 | IPCC::set_cpu2(true); | 36 | IPCC::set_cpu2(true); |
| @@ -61,56 +47,60 @@ impl<'d> Ipcc<'d> { | |||
| 61 | } | 47 | } |
| 62 | } | 48 | } |
| 63 | 49 | ||
| 64 | pub fn c1_set_rx_channel(&mut self, channel: IpccChannel, enabled: bool) { | 50 | pub(crate) fn c1_set_rx_channel(channel: IpccChannel, enabled: bool) { |
| 65 | let regs = IPCC::regs(); | 51 | let regs = IPCC::regs(); |
| 66 | 52 | ||
| 67 | // If bit is set to 1 then interrupt is disabled | 53 | // If bit is set to 1 then interrupt is disabled |
| 68 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } | 54 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } |
| 69 | } | 55 | } |
| 70 | 56 | ||
| 71 | pub fn c1_get_rx_channel(&self, channel: IpccChannel) -> bool { | 57 | pub(crate) fn c1_get_rx_channel(channel: IpccChannel) -> bool { |
| 72 | let regs = IPCC::regs(); | 58 | let regs = IPCC::regs(); |
| 73 | 59 | ||
| 74 | // If bit is set to 1 then interrupt is disabled | 60 | // If bit is set to 1 then interrupt is disabled |
| 75 | unsafe { !regs.cpu(0).mr().read().chom(channel as usize) } | 61 | unsafe { !regs.cpu(0).mr().read().chom(channel as usize) } |
| 76 | } | 62 | } |
| 77 | 63 | ||
| 78 | pub fn c2_set_rx_channel(&mut self, channel: IpccChannel, enabled: bool) { | 64 | #[allow(dead_code)] |
| 65 | pub(crate) fn c2_set_rx_channel(channel: IpccChannel, enabled: bool) { | ||
| 79 | let regs = IPCC::regs(); | 66 | let regs = IPCC::regs(); |
| 80 | 67 | ||
| 81 | // If bit is set to 1 then interrupt is disabled | 68 | // If bit is set to 1 then interrupt is disabled |
| 82 | unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } | 69 | unsafe { regs.cpu(1).mr().modify(|w| w.set_chom(channel as usize, !enabled)) } |
| 83 | } | 70 | } |
| 84 | 71 | ||
| 85 | pub fn c2_get_rx_channel(&self, channel: IpccChannel) -> bool { | 72 | #[allow(dead_code)] |
| 73 | pub(crate) fn c2_get_rx_channel(channel: IpccChannel) -> bool { | ||
| 86 | let regs = IPCC::regs(); | 74 | let regs = IPCC::regs(); |
| 87 | 75 | ||
| 88 | // If bit is set to 1 then interrupt is disabled | 76 | // If bit is set to 1 then interrupt is disabled |
| 89 | unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } | 77 | unsafe { !regs.cpu(1).mr().read().chom(channel as usize) } |
| 90 | } | 78 | } |
| 91 | 79 | ||
| 92 | pub fn c1_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) { | 80 | pub(crate) fn c1_set_tx_channel(channel: IpccChannel, enabled: bool) { |
| 93 | let regs = IPCC::regs(); | 81 | let regs = IPCC::regs(); |
| 94 | 82 | ||
| 95 | // If bit is set to 1 then interrupt is disabled | 83 | // If bit is set to 1 then interrupt is disabled |
| 96 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } | 84 | unsafe { regs.cpu(0).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } |
| 97 | } | 85 | } |
| 98 | 86 | ||
| 99 | pub fn c1_get_tx_channel(&self, channel: IpccChannel) -> bool { | 87 | pub(crate) fn c1_get_tx_channel(channel: IpccChannel) -> bool { |
| 100 | let regs = IPCC::regs(); | 88 | let regs = IPCC::regs(); |
| 101 | 89 | ||
| 102 | // If bit is set to 1 then interrupt is disabled | 90 | // If bit is set to 1 then interrupt is disabled |
| 103 | unsafe { !regs.cpu(0).mr().read().chfm(channel as usize) } | 91 | unsafe { !regs.cpu(0).mr().read().chfm(channel as usize) } |
| 104 | } | 92 | } |
| 105 | 93 | ||
| 106 | pub fn c2_set_tx_channel(&mut self, channel: IpccChannel, enabled: bool) { | 94 | #[allow(dead_code)] |
| 95 | pub(crate) fn c2_set_tx_channel(channel: IpccChannel, enabled: bool) { | ||
| 107 | let regs = IPCC::regs(); | 96 | let regs = IPCC::regs(); |
| 108 | 97 | ||
| 109 | // If bit is set to 1 then interrupt is disabled | 98 | // If bit is set to 1 then interrupt is disabled |
| 110 | unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } | 99 | unsafe { regs.cpu(1).mr().modify(|w| w.set_chfm(channel as usize, !enabled)) } |
| 111 | } | 100 | } |
| 112 | 101 | ||
| 113 | pub fn c2_get_tx_channel(&self, channel: IpccChannel) -> bool { | 102 | #[allow(dead_code)] |
| 103 | pub(crate) fn c2_get_tx_channel(channel: IpccChannel) -> bool { | ||
| 114 | let regs = IPCC::regs(); | 104 | let regs = IPCC::regs(); |
| 115 | 105 | ||
| 116 | // If bit is set to 1 then interrupt is disabled | 106 | // If bit is set to 1 then interrupt is disabled |
| @@ -118,53 +108,51 @@ impl<'d> Ipcc<'d> { | |||
| 118 | } | 108 | } |
| 119 | 109 | ||
| 120 | /// clears IPCC receive channel status for CPU1 | 110 | /// clears IPCC receive channel status for CPU1 |
| 121 | pub fn c1_clear_flag_channel(&mut self, channel: IpccChannel) { | 111 | pub(crate) fn c1_clear_flag_channel(channel: IpccChannel) { |
| 122 | let regs = IPCC::regs(); | 112 | let regs = IPCC::regs(); |
| 123 | 113 | ||
| 124 | unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } | 114 | unsafe { regs.cpu(0).scr().write(|w| w.set_chc(channel as usize, true)) } |
| 125 | } | 115 | } |
| 126 | 116 | ||
| 117 | #[allow(dead_code)] | ||
| 127 | /// clears IPCC receive channel status for CPU2 | 118 | /// clears IPCC receive channel status for CPU2 |
| 128 | pub fn c2_clear_flag_channel(&mut self, channel: IpccChannel) { | 119 | pub(crate) fn c2_clear_flag_channel(channel: IpccChannel) { |
| 129 | let regs = IPCC::regs(); | 120 | let regs = IPCC::regs(); |
| 130 | 121 | ||
| 131 | unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } | 122 | unsafe { regs.cpu(1).scr().write(|w| w.set_chc(channel as usize, true)) } |
| 132 | } | 123 | } |
| 133 | 124 | ||
| 134 | pub fn c1_set_flag_channel(&mut self, channel: IpccChannel) { | 125 | pub(crate) fn c1_set_flag_channel(channel: IpccChannel) { |
| 135 | let regs = IPCC::regs(); | 126 | let regs = IPCC::regs(); |
| 136 | 127 | ||
| 137 | unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } | 128 | unsafe { regs.cpu(0).scr().write(|w| w.set_chs(channel as usize, true)) } |
| 138 | } | 129 | } |
| 139 | 130 | ||
| 140 | pub fn c2_set_flag_channel(&mut self, channel: IpccChannel) { | 131 | #[allow(dead_code)] |
| 132 | pub(crate) fn c2_set_flag_channel(channel: IpccChannel) { | ||
| 141 | let regs = IPCC::regs(); | 133 | let regs = IPCC::regs(); |
| 142 | 134 | ||
| 143 | unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } | 135 | unsafe { regs.cpu(1).scr().write(|w| w.set_chs(channel as usize, true)) } |
| 144 | } | 136 | } |
| 145 | 137 | ||
| 146 | pub fn c1_is_active_flag(&self, channel: IpccChannel) -> bool { | 138 | pub(crate) fn c1_is_active_flag(channel: IpccChannel) -> bool { |
| 147 | let regs = IPCC::regs(); | 139 | let regs = IPCC::regs(); |
| 148 | 140 | ||
| 149 | unsafe { regs.cpu(0).sr().read().chf(channel as usize) } | 141 | unsafe { regs.cpu(0).sr().read().chf(channel as usize) } |
| 150 | } | 142 | } |
| 151 | 143 | ||
| 152 | pub fn c2_is_active_flag(&self, channel: IpccChannel) -> bool { | 144 | pub(crate) fn c2_is_active_flag(channel: IpccChannel) -> bool { |
| 153 | let regs = IPCC::regs(); | 145 | let regs = IPCC::regs(); |
| 154 | 146 | ||
| 155 | unsafe { regs.cpu(1).sr().read().chf(channel as usize) } | 147 | unsafe { regs.cpu(1).sr().read().chf(channel as usize) } |
| 156 | } | 148 | } |
| 157 | 149 | ||
| 158 | pub fn is_tx_pending(&self, channel: IpccChannel) -> bool { | 150 | pub(crate) fn is_tx_pending(channel: IpccChannel) -> bool { |
| 159 | !self.c1_is_active_flag(channel) && self.c1_get_tx_channel(channel) | 151 | !Self::c1_is_active_flag(channel) && Self::c1_get_tx_channel(channel) |
| 160 | } | ||
| 161 | |||
| 162 | pub fn is_rx_pending(&self, channel: IpccChannel) -> bool { | ||
| 163 | self.c2_is_active_flag(channel) && self.c1_get_rx_channel(channel) | ||
| 164 | } | 152 | } |
| 165 | 153 | ||
| 166 | pub fn as_mut_ptr(&self) -> *mut Self { | 154 | pub(crate) fn is_rx_pending(channel: IpccChannel) -> bool { |
| 167 | unsafe { &mut core::ptr::read(self) as *mut _ } | 155 | Self::c2_is_active_flag(channel) && Self::c1_get_rx_channel(channel) |
| 168 | } | 156 | } |
| 169 | } | 157 | } |
| 170 | 158 | ||
