aboutsummaryrefslogtreecommitdiff
path: root/embassy-stm32/src/timer/low_level.rs
diff options
context:
space:
mode:
Diffstat (limited to 'embassy-stm32/src/timer/low_level.rs')
-rw-r--r--embassy-stm32/src/timer/low_level.rs7
1 files changed, 7 insertions, 0 deletions
diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs
index e643722aa..3136ea4e9 100644
--- a/embassy-stm32/src/timer/low_level.rs
+++ b/embassy-stm32/src/timer/low_level.rs
@@ -6,6 +6,8 @@
6//! 6//!
7//! The available functionality depends on the timer type. 7//! The available functionality depends on the timer type.
8 8
9use core::mem::ManuallyDrop;
10
9use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef}; 11use embassy_hal_internal::{into_ref, Peripheral, PeripheralRef};
10// Re-export useful enums 12// Re-export useful enums
11pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource}; 13pub use stm32_metapac::timer::vals::{FilterValue, Sms as SlaveMode, Ts as TriggerSource};
@@ -198,6 +200,11 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
198 Self { tim } 200 Self { tim }
199 } 201 }
200 202
203 pub(crate) unsafe fn clone_unchecked(&self) -> ManuallyDrop<Self> {
204 let tim = unsafe { self.tim.clone_unchecked() };
205 ManuallyDrop::new(Self { tim })
206 }
207
201 /// Get access to the virutal core 16bit timer registers. 208 /// Get access to the virutal core 16bit timer registers.
202 /// 209 ///
203 /// Note: This works even if the timer is more capable, because registers 210 /// Note: This works even if the timer is more capable, because registers