aboutsummaryrefslogtreecommitdiff
path: root/embassy-stm32/src/timer
diff options
context:
space:
mode:
Diffstat (limited to 'embassy-stm32/src/timer')
-rw-r--r--embassy-stm32/src/timer/input_capture.rs2
-rw-r--r--embassy-stm32/src/timer/low_level.rs40
-rw-r--r--embassy-stm32/src/timer/simple_pwm.rs8
3 files changed, 25 insertions, 25 deletions
diff --git a/embassy-stm32/src/timer/input_capture.rs b/embassy-stm32/src/timer/input_capture.rs
index 341ac2c04..b7c13343c 100644
--- a/embassy-stm32/src/timer/input_capture.rs
+++ b/embassy-stm32/src/timer/input_capture.rs
@@ -129,7 +129,7 @@ impl<'d, T: GeneralInstance4Channel> InputCapture<'d, T> {
129 // Configuration steps from ST RM0390 (STM32F446) chapter 17.3.5 129 // Configuration steps from ST RM0390 (STM32F446) chapter 17.3.5
130 // or ST RM0008 (STM32F103) chapter 15.3.5 Input capture mode 130 // or ST RM0008 (STM32F103) chapter 15.3.5 Input capture mode
131 self.inner.set_input_ti_selection(channel, tisel); 131 self.inner.set_input_ti_selection(channel, tisel);
132 self.inner.set_input_capture_filter(channel, FilterValue::NOFILTER); 132 self.inner.set_input_capture_filter(channel, FilterValue::NO_FILTER);
133 self.inner.set_input_capture_mode(channel, mode); 133 self.inner.set_input_capture_mode(channel, mode);
134 self.inner.set_input_capture_prescaler(channel, 0); 134 self.inner.set_input_capture_prescaler(channel, 0);
135 self.inner.enable_channel(channel, true); 135 self.inner.enable_channel(channel, true);
diff --git a/embassy-stm32/src/timer/low_level.rs b/embassy-stm32/src/timer/low_level.rs
index 7360d6aef..80f77586c 100644
--- a/embassy-stm32/src/timer/low_level.rs
+++ b/embassy-stm32/src/timer/low_level.rs
@@ -95,11 +95,11 @@ impl CountingMode {
95impl From<CountingMode> for (vals::Cms, vals::Dir) { 95impl From<CountingMode> for (vals::Cms, vals::Dir) {
96 fn from(value: CountingMode) -> Self { 96 fn from(value: CountingMode) -> Self {
97 match value { 97 match value {
98 CountingMode::EdgeAlignedUp => (vals::Cms::EDGEALIGNED, vals::Dir::UP), 98 CountingMode::EdgeAlignedUp => (vals::Cms::EDGE_ALIGNED, vals::Dir::UP),
99 CountingMode::EdgeAlignedDown => (vals::Cms::EDGEALIGNED, vals::Dir::DOWN), 99 CountingMode::EdgeAlignedDown => (vals::Cms::EDGE_ALIGNED, vals::Dir::DOWN),
100 CountingMode::CenterAlignedDownInterrupts => (vals::Cms::CENTERALIGNED1, vals::Dir::UP), 100 CountingMode::CenterAlignedDownInterrupts => (vals::Cms::CENTER_ALIGNED1, vals::Dir::UP),
101 CountingMode::CenterAlignedUpInterrupts => (vals::Cms::CENTERALIGNED2, vals::Dir::UP), 101 CountingMode::CenterAlignedUpInterrupts => (vals::Cms::CENTER_ALIGNED2, vals::Dir::UP),
102 CountingMode::CenterAlignedBothInterrupts => (vals::Cms::CENTERALIGNED3, vals::Dir::UP), 102 CountingMode::CenterAlignedBothInterrupts => (vals::Cms::CENTER_ALIGNED3, vals::Dir::UP),
103 } 103 }
104 } 104 }
105} 105}
@@ -107,11 +107,11 @@ impl From<CountingMode> for (vals::Cms, vals::Dir) {
107impl From<(vals::Cms, vals::Dir)> for CountingMode { 107impl From<(vals::Cms, vals::Dir)> for CountingMode {
108 fn from(value: (vals::Cms, vals::Dir)) -> Self { 108 fn from(value: (vals::Cms, vals::Dir)) -> Self {
109 match value { 109 match value {
110 (vals::Cms::EDGEALIGNED, vals::Dir::UP) => CountingMode::EdgeAlignedUp, 110 (vals::Cms::EDGE_ALIGNED, vals::Dir::UP) => CountingMode::EdgeAlignedUp,
111 (vals::Cms::EDGEALIGNED, vals::Dir::DOWN) => CountingMode::EdgeAlignedDown, 111 (vals::Cms::EDGE_ALIGNED, vals::Dir::DOWN) => CountingMode::EdgeAlignedDown,
112 (vals::Cms::CENTERALIGNED1, _) => CountingMode::CenterAlignedDownInterrupts, 112 (vals::Cms::CENTER_ALIGNED1, _) => CountingMode::CenterAlignedDownInterrupts,
113 (vals::Cms::CENTERALIGNED2, _) => CountingMode::CenterAlignedUpInterrupts, 113 (vals::Cms::CENTER_ALIGNED2, _) => CountingMode::CenterAlignedUpInterrupts,
114 (vals::Cms::CENTERALIGNED3, _) => CountingMode::CenterAlignedBothInterrupts, 114 (vals::Cms::CENTER_ALIGNED3, _) => CountingMode::CenterAlignedBothInterrupts,
115 } 115 }
116 } 116 }
117} 117}
@@ -150,13 +150,13 @@ impl From<OutputCompareMode> for stm32_metapac::timer::vals::Ocm {
150 fn from(mode: OutputCompareMode) -> Self { 150 fn from(mode: OutputCompareMode) -> Self {
151 match mode { 151 match mode {
152 OutputCompareMode::Frozen => stm32_metapac::timer::vals::Ocm::FROZEN, 152 OutputCompareMode::Frozen => stm32_metapac::timer::vals::Ocm::FROZEN,
153 OutputCompareMode::ActiveOnMatch => stm32_metapac::timer::vals::Ocm::ACTIVEONMATCH, 153 OutputCompareMode::ActiveOnMatch => stm32_metapac::timer::vals::Ocm::ACTIVE_ON_MATCH,
154 OutputCompareMode::InactiveOnMatch => stm32_metapac::timer::vals::Ocm::INACTIVEONMATCH, 154 OutputCompareMode::InactiveOnMatch => stm32_metapac::timer::vals::Ocm::INACTIVE_ON_MATCH,
155 OutputCompareMode::Toggle => stm32_metapac::timer::vals::Ocm::TOGGLE, 155 OutputCompareMode::Toggle => stm32_metapac::timer::vals::Ocm::TOGGLE,
156 OutputCompareMode::ForceInactive => stm32_metapac::timer::vals::Ocm::FORCEINACTIVE, 156 OutputCompareMode::ForceInactive => stm32_metapac::timer::vals::Ocm::FORCE_INACTIVE,
157 OutputCompareMode::ForceActive => stm32_metapac::timer::vals::Ocm::FORCEACTIVE, 157 OutputCompareMode::ForceActive => stm32_metapac::timer::vals::Ocm::FORCE_ACTIVE,
158 OutputCompareMode::PwmMode1 => stm32_metapac::timer::vals::Ocm::PWMMODE1, 158 OutputCompareMode::PwmMode1 => stm32_metapac::timer::vals::Ocm::PWM_MODE1,
159 OutputCompareMode::PwmMode2 => stm32_metapac::timer::vals::Ocm::PWMMODE2, 159 OutputCompareMode::PwmMode2 => stm32_metapac::timer::vals::Ocm::PWM_MODE2,
160 } 160 }
161 } 161 }
162} 162}
@@ -271,9 +271,9 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
271 regs.psc().write_value(psc); 271 regs.psc().write_value(psc);
272 regs.arr().write(|r| r.set_arr(arr)); 272 regs.arr().write(|r| r.set_arr(arr));
273 273
274 regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); 274 regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTER_ONLY));
275 regs.egr().write(|r| r.set_ug(true)); 275 regs.egr().write(|r| r.set_ug(true));
276 regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT)); 276 regs.cr1().modify(|r| r.set_urs(vals::Urs::ANY_EVENT));
277 } 277 }
278 #[cfg(not(stm32l0))] 278 #[cfg(not(stm32l0))]
279 TimerBits::Bits32 => { 279 TimerBits::Bits32 => {
@@ -284,9 +284,9 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
284 regs.psc().write_value(psc); 284 regs.psc().write_value(psc);
285 regs.arr().write_value(arr); 285 regs.arr().write_value(arr);
286 286
287 regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTERONLY)); 287 regs.cr1().modify(|r| r.set_urs(vals::Urs::COUNTER_ONLY));
288 regs.egr().write(|r| r.set_ug(true)); 288 regs.egr().write(|r| r.set_ug(true));
289 regs.cr1().modify(|r| r.set_urs(vals::Urs::ANYEVENT)); 289 regs.cr1().modify(|r| r.set_urs(vals::Urs::ANY_EVENT));
290 } 290 }
291 } 291 }
292 } 292 }
diff --git a/embassy-stm32/src/timer/simple_pwm.rs b/embassy-stm32/src/timer/simple_pwm.rs
index 56fb1871e..6d5d6c062 100644
--- a/embassy-stm32/src/timer/simple_pwm.rs
+++ b/embassy-stm32/src/timer/simple_pwm.rs
@@ -292,7 +292,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
292 292
293 /// Generate a sequence of PWM waveform 293 /// Generate a sequence of PWM waveform
294 /// 294 ///
295 /// Note: 295 /// Note:
296 /// you will need to provide corresponding TIMx_UP DMA channel to use this method. 296 /// you will need to provide corresponding TIMx_UP DMA channel to use this method.
297 pub async fn waveform_up( 297 pub async fn waveform_up(
298 &mut self, 298 &mut self,
@@ -377,12 +377,12 @@ macro_rules! impl_waveform_chx {
377 377
378 let original_duty_state = self.channel(cc_channel).current_duty_cycle(); 378 let original_duty_state = self.channel(cc_channel).current_duty_cycle();
379 let original_enable_state = self.channel(cc_channel).is_enabled(); 379 let original_enable_state = self.channel(cc_channel).is_enabled();
380 let original_cc_dma_on_update = self.inner.get_cc_dma_selection() == Ccds::ONUPDATE; 380 let original_cc_dma_on_update = self.inner.get_cc_dma_selection() == Ccds::ON_UPDATE;
381 let original_cc_dma_enabled = self.inner.get_cc_dma_enable_state(cc_channel); 381 let original_cc_dma_enabled = self.inner.get_cc_dma_enable_state(cc_channel);
382 382
383 // redirect CC DMA request onto Update Event 383 // redirect CC DMA request onto Update Event
384 if !original_cc_dma_on_update { 384 if !original_cc_dma_on_update {
385 self.inner.set_cc_dma_selection(Ccds::ONUPDATE) 385 self.inner.set_cc_dma_selection(Ccds::ON_UPDATE)
386 } 386 }
387 387
388 if !original_cc_dma_enabled { 388 if !original_cc_dma_enabled {
@@ -433,7 +433,7 @@ macro_rules! impl_waveform_chx {
433 } 433 }
434 434
435 if !original_cc_dma_on_update { 435 if !original_cc_dma_on_update {
436 self.inner.set_cc_dma_selection(Ccds::ONCOMPARE) 436 self.inner.set_cc_dma_selection(Ccds::ON_COMPARE)
437 } 437 }
438 } 438 }
439 } 439 }