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-rw-r--r--embassy-stm32/src/i2c/timeout.rs75
-rw-r--r--embassy-stm32/src/i2c/v1.rs73
-rw-r--r--embassy-stm32/src/i2c/v2.rs158
3 files changed, 119 insertions, 187 deletions
diff --git a/embassy-stm32/src/i2c/timeout.rs b/embassy-stm32/src/i2c/timeout.rs
index 4fca1ca2b..939e2750e 100644
--- a/embassy-stm32/src/i2c/timeout.rs
+++ b/embassy-stm32/src/i2c/timeout.rs
@@ -28,64 +28,64 @@ impl<'d, T: Instance, TXDMA, RXDMA> TimeoutI2c<'d, T, TXDMA, RXDMA> {
28 } 28 }
29 29
30 /// Blocking read with a custom timeout 30 /// Blocking read with a custom timeout
31 pub fn blocking_read_timeout(&mut self, addr: u8, buffer: &mut [u8], timeout: Duration) -> Result<(), Error> { 31 pub fn blocking_read_timeout(&mut self, addr: u8, read: &mut [u8], timeout: Duration) -> Result<(), Error> {
32 self.i2c.blocking_read_timeout(addr, buffer, timeout_fn(timeout)) 32 self.i2c.blocking_read_timeout(addr, read, timeout_fn(timeout))
33 } 33 }
34 34
35 /// Blocking read with default timeout, provided in [`TimeoutI2c::new()`] 35 /// Blocking read with default timeout, provided in [`TimeoutI2c::new()`]
36 pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> { 36 pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
37 self.blocking_read_timeout(addr, buffer, self.timeout) 37 self.blocking_read_timeout(addr, read, self.timeout)
38 } 38 }
39 39
40 /// Blocking write with a custom timeout 40 /// Blocking write with a custom timeout
41 pub fn blocking_write_timeout(&mut self, addr: u8, bytes: &[u8], timeout: Duration) -> Result<(), Error> { 41 pub fn blocking_write_timeout(&mut self, addr: u8, write: &[u8], timeout: Duration) -> Result<(), Error> {
42 self.i2c.blocking_write_timeout(addr, bytes, timeout_fn(timeout)) 42 self.i2c.blocking_write_timeout(addr, write, timeout_fn(timeout))
43 } 43 }
44 44
45 /// Blocking write with default timeout, provided in [`TimeoutI2c::new()`] 45 /// Blocking write with default timeout, provided in [`TimeoutI2c::new()`]
46 pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> { 46 pub fn blocking_write(&mut self, addr: u8, write: &[u8]) -> Result<(), Error> {
47 self.blocking_write_timeout(addr, bytes, self.timeout) 47 self.blocking_write_timeout(addr, write, self.timeout)
48 } 48 }
49 49
50 /// Blocking write-read with a custom timeout 50 /// Blocking write-read with a custom timeout
51 pub fn blocking_write_read_timeout( 51 pub fn blocking_write_read_timeout(
52 &mut self, 52 &mut self,
53 addr: u8, 53 addr: u8,
54 bytes: &[u8], 54 write: &[u8],
55 buffer: &mut [u8], 55 read: &mut [u8],
56 timeout: Duration, 56 timeout: Duration,
57 ) -> Result<(), Error> { 57 ) -> Result<(), Error> {
58 self.i2c 58 self.i2c
59 .blocking_write_read_timeout(addr, bytes, buffer, timeout_fn(timeout)) 59 .blocking_write_read_timeout(addr, write, read, timeout_fn(timeout))
60 } 60 }
61 61
62 /// Blocking write-read with default timeout, provided in [`TimeoutI2c::new()`] 62 /// Blocking write-read with default timeout, provided in [`TimeoutI2c::new()`]
63 pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> { 63 pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
64 self.blocking_write_read_timeout(addr, bytes, buffer, self.timeout) 64 self.blocking_write_read_timeout(addr, write, read, self.timeout)
65 } 65 }
66} 66}
67 67
68impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read for TimeoutI2c<'d, T, TXDMA, RXDMA> { 68impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Read for TimeoutI2c<'d, T, TXDMA, RXDMA> {
69 type Error = Error; 69 type Error = Error;
70 70
71 fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 71 fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
72 self.blocking_read(addr, buffer) 72 self.blocking_read(addr, read)
73 } 73 }
74} 74}
75 75
76impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write for TimeoutI2c<'d, T, TXDMA, RXDMA> { 76impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::Write for TimeoutI2c<'d, T, TXDMA, RXDMA> {
77 type Error = Error; 77 type Error = Error;
78 78
79 fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> { 79 fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
80 self.blocking_write(addr, bytes) 80 self.blocking_write(addr, write)
81 } 81 }
82} 82}
83 83
84impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead for TimeoutI2c<'d, T, TXDMA, RXDMA> { 84impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_02::blocking::i2c::WriteRead for TimeoutI2c<'d, T, TXDMA, RXDMA> {
85 type Error = Error; 85 type Error = Error;
86 86
87 fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> { 87 fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
88 self.blocking_write_read(addr, bytes, buffer) 88 self.blocking_write_read(addr, write, read)
89 } 89 }
90} 90}
91 91
@@ -98,45 +98,24 @@ mod eh1 {
98 } 98 }
99 99
100 impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'d, T, TXDMA, RXDMA> { 100 impl<'d, T: Instance, TXDMA, RXDMA> embedded_hal_1::i2c::I2c for TimeoutI2c<'d, T, TXDMA, RXDMA> {
101 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 101 fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
102 self.blocking_read(address, buffer) 102 self.blocking_read(address, read)
103 } 103 }
104 104
105 fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> { 105 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
106 self.blocking_write(address, buffer) 106 self.blocking_write(address, write)
107 } 107 }
108 108
109 fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error> 109 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
110 where 110 self.blocking_write_read(address, write, read)
111 B: IntoIterator<Item = u8>,
112 {
113 todo!();
114 } 111 }
115 112
116 fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error> 113 fn transaction(
117 where
118 B: IntoIterator<Item = u8>,
119 {
120 todo!();
121 }
122
123 fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> {
124 self.blocking_write_read(address, wr_buffer, rd_buffer)
125 }
126
127 fn transaction<'a>(
128 &mut self, 114 &mut self,
129 _address: u8, 115 _address: u8,
130 _operations: &mut [embedded_hal_1::i2c::Operation<'a>], 116 _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
131 ) -> Result<(), Self::Error> { 117 ) -> Result<(), Self::Error> {
132 todo!(); 118 todo!();
133 } 119 }
134
135 fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
136 where
137 O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
138 {
139 todo!();
140 }
141 } 120 }
142} 121}
diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
index f140e2b0d..4b47f0eb1 100644
--- a/embassy-stm32/src/i2c/v1.rs
+++ b/embassy-stm32/src/i2c/v1.rs
@@ -307,18 +307,18 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
307 } 307 }
308 } 308 }
309 309
310 pub fn blocking_read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Error> { 310 pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
311 self.blocking_read_timeout(addr, buffer, || Ok(())) 311 self.blocking_read_timeout(addr, read, || Ok(()))
312 } 312 }
313 313
314 pub fn blocking_write_timeout( 314 pub fn blocking_write_timeout(
315 &mut self, 315 &mut self,
316 addr: u8, 316 addr: u8,
317 bytes: &[u8], 317 write: &[u8],
318 check_timeout: impl Fn() -> Result<(), Error>, 318 check_timeout: impl Fn() -> Result<(), Error>,
319 ) -> Result<(), Error> { 319 ) -> Result<(), Error> {
320 unsafe { 320 unsafe {
321 self.write_bytes(addr, bytes, &check_timeout)?; 321 self.write_bytes(addr, write, &check_timeout)?;
322 // Send a STOP condition 322 // Send a STOP condition
323 T::regs().cr1().modify(|reg| reg.set_stop(true)); 323 T::regs().cr1().modify(|reg| reg.set_stop(true));
324 // Wait for STOP condition to transmit. 324 // Wait for STOP condition to transmit.
@@ -331,49 +331,49 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
331 Ok(()) 331 Ok(())
332 } 332 }
333 333
334 pub fn blocking_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> { 334 pub fn blocking_write(&mut self, addr: u8, write: &[u8]) -> Result<(), Error> {
335 self.blocking_write_timeout(addr, bytes, || Ok(())) 335 self.blocking_write_timeout(addr, write, || Ok(()))
336 } 336 }
337 337
338 pub fn blocking_write_read_timeout( 338 pub fn blocking_write_read_timeout(
339 &mut self, 339 &mut self,
340 addr: u8, 340 addr: u8,
341 bytes: &[u8], 341 write: &[u8],
342 buffer: &mut [u8], 342 read: &mut [u8],
343 check_timeout: impl Fn() -> Result<(), Error>, 343 check_timeout: impl Fn() -> Result<(), Error>,
344 ) -> Result<(), Error> { 344 ) -> Result<(), Error> {
345 unsafe { self.write_bytes(addr, bytes, &check_timeout)? }; 345 unsafe { self.write_bytes(addr, write, &check_timeout)? };
346 self.blocking_read_timeout(addr, buffer, &check_timeout)?; 346 self.blocking_read_timeout(addr, read, &check_timeout)?;
347 347
348 Ok(()) 348 Ok(())
349 } 349 }
350 350
351 pub fn blocking_write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> { 351 pub fn blocking_write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
352 self.blocking_write_read_timeout(addr, bytes, buffer, || Ok(())) 352 self.blocking_write_read_timeout(addr, write, read, || Ok(()))
353 } 353 }
354} 354}
355 355
356impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> { 356impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Read for I2c<'d, T> {
357 type Error = Error; 357 type Error = Error;
358 358
359 fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 359 fn read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Self::Error> {
360 self.blocking_read(addr, buffer) 360 self.blocking_read(addr, read)
361 } 361 }
362} 362}
363 363
364impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { 364impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
365 type Error = Error; 365 type Error = Error;
366 366
367 fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> { 367 fn write(&mut self, addr: u8, write: &[u8]) -> Result<(), Self::Error> {
368 self.blocking_write(addr, bytes) 368 self.blocking_write(addr, write)
369 } 369 }
370} 370}
371 371
372impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { 372impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
373 type Error = Error; 373 type Error = Error;
374 374
375 fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> { 375 fn write_read(&mut self, addr: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
376 self.blocking_write_read(addr, bytes, buffer) 376 self.blocking_write_read(addr, write, read)
377 } 377 }
378} 378}
379 379
@@ -402,46 +402,25 @@ mod eh1 {
402 } 402 }
403 403
404 impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> { 404 impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T> {
405 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 405 fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
406 self.blocking_read(address, buffer) 406 self.blocking_read(address, read)
407 }
408
409 fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
410 self.blocking_write(address, buffer)
411 }
412
413 fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
414 where
415 B: IntoIterator<Item = u8>,
416 {
417 todo!();
418 } 407 }
419 408
420 fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error> 409 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
421 where 410 self.blocking_write(address, write)
422 B: IntoIterator<Item = u8>,
423 {
424 todo!();
425 } 411 }
426 412
427 fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { 413 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
428 self.blocking_write_read(address, wr_buffer, rd_buffer) 414 self.blocking_write_read(address, write, read)
429 } 415 }
430 416
431 fn transaction<'a>( 417 fn transaction(
432 &mut self, 418 &mut self,
433 _address: u8, 419 _address: u8,
434 _operations: &mut [embedded_hal_1::i2c::Operation<'a>], 420 _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
435 ) -> Result<(), Self::Error> { 421 ) -> Result<(), Self::Error> {
436 todo!(); 422 todo!();
437 } 423 }
438
439 fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
440 where
441 O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
442 {
443 todo!();
444 }
445 } 424 }
446} 425}
447 426
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 06ff07b21..28663fb36 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -345,12 +345,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
345 fn read_internal( 345 fn read_internal(
346 &mut self, 346 &mut self,
347 address: u8, 347 address: u8,
348 buffer: &mut [u8], 348 read: &mut [u8],
349 restart: bool, 349 restart: bool,
350 check_timeout: impl Fn() -> Result<(), Error>, 350 check_timeout: impl Fn() -> Result<(), Error>,
351 ) -> Result<(), Error> { 351 ) -> Result<(), Error> {
352 let completed_chunks = buffer.len() / 255; 352 let completed_chunks = read.len() / 255;
353 let total_chunks = if completed_chunks * 255 == buffer.len() { 353 let total_chunks = if completed_chunks * 255 == read.len() {
354 completed_chunks 354 completed_chunks
355 } else { 355 } else {
356 completed_chunks + 1 356 completed_chunks + 1
@@ -360,7 +360,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
360 unsafe { 360 unsafe {
361 Self::master_read( 361 Self::master_read(
362 address, 362 address,
363 buffer.len().min(255), 363 read.len().min(255),
364 Stop::Automatic, 364 Stop::Automatic,
365 last_chunk_idx != 0, 365 last_chunk_idx != 0,
366 restart, 366 restart,
@@ -368,7 +368,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
368 )?; 368 )?;
369 } 369 }
370 370
371 for (number, chunk) in buffer.chunks_mut(255).enumerate() { 371 for (number, chunk) in read.chunks_mut(255).enumerate() {
372 if number != 0 { 372 if number != 0 {
373 // NOTE(unsafe) We have &mut self 373 // NOTE(unsafe) We have &mut self
374 unsafe { 374 unsafe {
@@ -391,12 +391,12 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
391 fn write_internal( 391 fn write_internal(
392 &mut self, 392 &mut self,
393 address: u8, 393 address: u8,
394 bytes: &[u8], 394 write: &[u8],
395 send_stop: bool, 395 send_stop: bool,
396 check_timeout: impl Fn() -> Result<(), Error>, 396 check_timeout: impl Fn() -> Result<(), Error>,
397 ) -> Result<(), Error> { 397 ) -> Result<(), Error> {
398 let completed_chunks = bytes.len() / 255; 398 let completed_chunks = write.len() / 255;
399 let total_chunks = if completed_chunks * 255 == bytes.len() { 399 let total_chunks = if completed_chunks * 255 == write.len() {
400 completed_chunks 400 completed_chunks
401 } else { 401 } else {
402 completed_chunks + 1 402 completed_chunks + 1
@@ -410,14 +410,14 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
410 unsafe { 410 unsafe {
411 Self::master_write( 411 Self::master_write(
412 address, 412 address,
413 bytes.len().min(255), 413 write.len().min(255),
414 Stop::Software, 414 Stop::Software,
415 last_chunk_idx != 0, 415 last_chunk_idx != 0,
416 &check_timeout, 416 &check_timeout,
417 )?; 417 )?;
418 } 418 }
419 419
420 for (number, chunk) in bytes.chunks(255).enumerate() { 420 for (number, chunk) in write.chunks(255).enumerate() {
421 if number != 0 { 421 if number != 0 {
422 // NOTE(unsafe) We have &mut self 422 // NOTE(unsafe) We have &mut self
423 unsafe { 423 unsafe {
@@ -448,7 +448,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
448 async fn write_dma_internal( 448 async fn write_dma_internal(
449 &mut self, 449 &mut self,
450 address: u8, 450 address: u8,
451 bytes: &[u8], 451 write: &[u8],
452 first_slice: bool, 452 first_slice: bool,
453 last_slice: bool, 453 last_slice: bool,
454 check_timeout: impl Fn() -> Result<(), Error>, 454 check_timeout: impl Fn() -> Result<(), Error>,
@@ -456,7 +456,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
456 where 456 where
457 TXDMA: crate::i2c::TxDma<T>, 457 TXDMA: crate::i2c::TxDma<T>,
458 { 458 {
459 let total_len = bytes.len(); 459 let total_len = write.len();
460 let completed_chunks = total_len / 255; 460 let completed_chunks = total_len / 255;
461 let total_chunks = if completed_chunks * 255 == total_len { 461 let total_chunks = if completed_chunks * 255 == total_len {
462 completed_chunks 462 completed_chunks
@@ -476,7 +476,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
476 476
477 let ch = &mut self.tx_dma; 477 let ch = &mut self.tx_dma;
478 let request = ch.request(); 478 let request = ch.request();
479 crate::dma::write(ch, request, bytes, dst) 479 crate::dma::write(ch, request, write, dst)
480 }; 480 };
481 481
482 let state = T::state(); 482 let state = T::state();
@@ -641,25 +641,25 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
641 // ========================= 641 // =========================
642 // Async public API 642 // Async public API
643 643
644 pub async fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Error> 644 pub async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Error>
645 where 645 where
646 TXDMA: crate::i2c::TxDma<T>, 646 TXDMA: crate::i2c::TxDma<T>,
647 { 647 {
648 if bytes.is_empty() { 648 if write.is_empty() {
649 self.write_internal(address, bytes, true, || Ok(())) 649 self.write_internal(address, write, true, || Ok(()))
650 } else { 650 } else {
651 self.write_dma_internal(address, bytes, true, true, || Ok(())).await 651 self.write_dma_internal(address, write, true, true, || Ok(())).await
652 } 652 }
653 } 653 }
654 654
655 pub async fn write_vectored(&mut self, address: u8, bytes: &[&[u8]]) -> Result<(), Error> 655 pub async fn write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error>
656 where 656 where
657 TXDMA: crate::i2c::TxDma<T>, 657 TXDMA: crate::i2c::TxDma<T>,
658 { 658 {
659 if bytes.is_empty() { 659 if write.is_empty() {
660 return Err(Error::ZeroLengthTransfer); 660 return Err(Error::ZeroLengthTransfer);
661 } 661 }
662 let mut iter = bytes.iter(); 662 let mut iter = write.iter();
663 663
664 let mut first = true; 664 let mut first = true;
665 let mut current = iter.next(); 665 let mut current = iter.next();
@@ -685,21 +685,21 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
685 } 685 }
686 } 686 }
687 687
688 pub async fn write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> 688 pub async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error>
689 where 689 where
690 TXDMA: super::TxDma<T>, 690 TXDMA: super::TxDma<T>,
691 RXDMA: super::RxDma<T>, 691 RXDMA: super::RxDma<T>,
692 { 692 {
693 if bytes.is_empty() { 693 if write.is_empty() {
694 self.write_internal(address, bytes, false, || Ok(()))?; 694 self.write_internal(address, write, false, || Ok(()))?;
695 } else { 695 } else {
696 self.write_dma_internal(address, bytes, true, true, || Ok(())).await?; 696 self.write_dma_internal(address, write, true, true, || Ok(())).await?;
697 } 697 }
698 698
699 if buffer.is_empty() { 699 if read.is_empty() {
700 self.read_internal(address, buffer, true, || Ok(()))?; 700 self.read_internal(address, read, true, || Ok(()))?;
701 } else { 701 } else {
702 self.read_dma_internal(address, buffer, true, || Ok(())).await?; 702 self.read_dma_internal(address, read, true, || Ok(())).await?;
703 } 703 }
704 704
705 Ok(()) 705 Ok(())
@@ -711,57 +711,57 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
711 pub fn blocking_read_timeout( 711 pub fn blocking_read_timeout(
712 &mut self, 712 &mut self,
713 address: u8, 713 address: u8,
714 buffer: &mut [u8], 714 read: &mut [u8],
715 check_timeout: impl Fn() -> Result<(), Error>, 715 check_timeout: impl Fn() -> Result<(), Error>,
716 ) -> Result<(), Error> { 716 ) -> Result<(), Error> {
717 self.read_internal(address, buffer, false, &check_timeout) 717 self.read_internal(address, read, false, &check_timeout)
718 // Automatic Stop 718 // Automatic Stop
719 } 719 }
720 720
721 pub fn blocking_read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Error> { 721 pub fn blocking_read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Error> {
722 self.blocking_read_timeout(address, buffer, || Ok(())) 722 self.blocking_read_timeout(address, read, || Ok(()))
723 } 723 }
724 724
725 pub fn blocking_write_timeout( 725 pub fn blocking_write_timeout(
726 &mut self, 726 &mut self,
727 address: u8, 727 address: u8,
728 bytes: &[u8], 728 write: &[u8],
729 check_timeout: impl Fn() -> Result<(), Error>, 729 check_timeout: impl Fn() -> Result<(), Error>,
730 ) -> Result<(), Error> { 730 ) -> Result<(), Error> {
731 self.write_internal(address, bytes, true, &check_timeout) 731 self.write_internal(address, write, true, &check_timeout)
732 } 732 }
733 733
734 pub fn blocking_write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Error> { 734 pub fn blocking_write(&mut self, address: u8, write: &[u8]) -> Result<(), Error> {
735 self.blocking_write_timeout(address, bytes, || Ok(())) 735 self.blocking_write_timeout(address, write, || Ok(()))
736 } 736 }
737 737
738 pub fn blocking_write_read_timeout( 738 pub fn blocking_write_read_timeout(
739 &mut self, 739 &mut self,
740 address: u8, 740 address: u8,
741 bytes: &[u8], 741 write: &[u8],
742 buffer: &mut [u8], 742 read: &mut [u8],
743 check_timeout: impl Fn() -> Result<(), Error>, 743 check_timeout: impl Fn() -> Result<(), Error>,
744 ) -> Result<(), Error> { 744 ) -> Result<(), Error> {
745 self.write_internal(address, bytes, false, &check_timeout)?; 745 self.write_internal(address, write, false, &check_timeout)?;
746 self.read_internal(address, buffer, true, &check_timeout) 746 self.read_internal(address, read, true, &check_timeout)
747 // Automatic Stop 747 // Automatic Stop
748 } 748 }
749 749
750 pub fn blocking_write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Error> { 750 pub fn blocking_write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Error> {
751 self.blocking_write_read_timeout(address, bytes, buffer, || Ok(())) 751 self.blocking_write_read_timeout(address, write, read, || Ok(()))
752 } 752 }
753 753
754 pub fn blocking_write_vectored_timeout( 754 pub fn blocking_write_vectored_timeout(
755 &mut self, 755 &mut self,
756 address: u8, 756 address: u8,
757 bytes: &[&[u8]], 757 write: &[&[u8]],
758 check_timeout: impl Fn() -> Result<(), Error>, 758 check_timeout: impl Fn() -> Result<(), Error>,
759 ) -> Result<(), Error> { 759 ) -> Result<(), Error> {
760 if bytes.is_empty() { 760 if write.is_empty() {
761 return Err(Error::ZeroLengthTransfer); 761 return Err(Error::ZeroLengthTransfer);
762 } 762 }
763 let first_length = bytes[0].len(); 763 let first_length = write[0].len();
764 let last_slice_index = bytes.len() - 1; 764 let last_slice_index = write.len() - 1;
765 765
766 // NOTE(unsafe) We have &mut self 766 // NOTE(unsafe) We have &mut self
767 unsafe { 767 unsafe {
@@ -774,7 +774,7 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
774 )?; 774 )?;
775 } 775 }
776 776
777 for (idx, slice) in bytes.iter().enumerate() { 777 for (idx, slice) in write.iter().enumerate() {
778 let slice_len = slice.len(); 778 let slice_len = slice.len();
779 let completed_chunks = slice_len / 255; 779 let completed_chunks = slice_len / 255;
780 let total_chunks = if completed_chunks * 255 == slice_len { 780 let total_chunks = if completed_chunks * 255 == slice_len {
@@ -828,8 +828,8 @@ impl<'d, T: Instance, TXDMA, RXDMA> I2c<'d, T, TXDMA, RXDMA> {
828 Ok(()) 828 Ok(())
829 } 829 }
830 830
831 pub fn blocking_write_vectored(&mut self, address: u8, bytes: &[&[u8]]) -> Result<(), Error> { 831 pub fn blocking_write_vectored(&mut self, address: u8, write: &[&[u8]]) -> Result<(), Error> {
832 self.blocking_write_vectored_timeout(address, bytes, || Ok(())) 832 self.blocking_write_vectored_timeout(address, write, || Ok(()))
833 } 833 }
834} 834}
835 835
@@ -847,16 +847,16 @@ mod eh02 {
847 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> { 847 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::Write for I2c<'d, T> {
848 type Error = Error; 848 type Error = Error;
849 849
850 fn write(&mut self, address: u8, bytes: &[u8]) -> Result<(), Self::Error> { 850 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
851 self.blocking_write(address, bytes) 851 self.blocking_write(address, write)
852 } 852 }
853 } 853 }
854 854
855 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> { 855 impl<'d, T: Instance> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, T> {
856 type Error = Error; 856 type Error = Error;
857 857
858 fn write_read(&mut self, address: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> { 858 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
859 self.blocking_write_read(address, bytes, buffer) 859 self.blocking_write_read(address, write, read)
860 } 860 }
861 } 861 }
862} 862}
@@ -1010,46 +1010,25 @@ mod eh1 {
1010 } 1010 }
1011 1011
1012 impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> { 1012 impl<'d, T: Instance> embedded_hal_1::i2c::I2c for I2c<'d, T, NoDma, NoDma> {
1013 fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> { 1013 fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
1014 self.blocking_read(address, buffer) 1014 self.blocking_read(address, read)
1015 }
1016
1017 fn write(&mut self, address: u8, buffer: &[u8]) -> Result<(), Self::Error> {
1018 self.blocking_write(address, buffer)
1019 }
1020
1021 fn write_iter<B>(&mut self, _address: u8, _bytes: B) -> Result<(), Self::Error>
1022 where
1023 B: IntoIterator<Item = u8>,
1024 {
1025 todo!();
1026 } 1015 }
1027 1016
1028 fn write_iter_read<B>(&mut self, _address: u8, _bytes: B, _buffer: &mut [u8]) -> Result<(), Self::Error> 1017 fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
1029 where 1018 self.blocking_write(address, write)
1030 B: IntoIterator<Item = u8>,
1031 {
1032 todo!();
1033 } 1019 }
1034 1020
1035 fn write_read(&mut self, address: u8, wr_buffer: &[u8], rd_buffer: &mut [u8]) -> Result<(), Self::Error> { 1021 fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
1036 self.blocking_write_read(address, wr_buffer, rd_buffer) 1022 self.blocking_write_read(address, write, read)
1037 } 1023 }
1038 1024
1039 fn transaction<'a>( 1025 fn transaction(
1040 &mut self, 1026 &mut self,
1041 _address: u8, 1027 _address: u8,
1042 _operations: &mut [embedded_hal_1::i2c::Operation<'a>], 1028 _operations: &mut [embedded_hal_1::i2c::Operation<'_>],
1043 ) -> Result<(), Self::Error> { 1029 ) -> Result<(), Self::Error> {
1044 todo!(); 1030 todo!();
1045 } 1031 }
1046
1047 fn transaction_iter<'a, O>(&mut self, _address: u8, _operations: O) -> Result<(), Self::Error>
1048 where
1049 O: IntoIterator<Item = embedded_hal_1::i2c::Operation<'a>>,
1050 {
1051 todo!();
1052 }
1053 } 1032 }
1054} 1033}
1055 1034
@@ -1059,27 +1038,22 @@ mod eha {
1059 use super::*; 1038 use super::*;
1060 1039
1061 impl<'d, T: Instance, TXDMA: TxDma<T>, RXDMA: RxDma<T>> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> { 1040 impl<'d, T: Instance, TXDMA: TxDma<T>, RXDMA: RxDma<T>> embedded_hal_async::i2c::I2c for I2c<'d, T, TXDMA, RXDMA> {
1062 async fn read<'a>(&'a mut self, address: u8, read: &'a mut [u8]) -> Result<(), Self::Error> { 1041 async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
1063 self.read(address, read).await 1042 self.read(address, read).await
1064 } 1043 }
1065 1044
1066 async fn write<'a>(&'a mut self, address: u8, write: &'a [u8]) -> Result<(), Self::Error> { 1045 async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
1067 self.write(address, write).await 1046 self.write(address, write).await
1068 } 1047 }
1069 1048
1070 async fn write_read<'a>( 1049 async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
1071 &'a mut self,
1072 address: u8,
1073 write: &'a [u8],
1074 read: &'a mut [u8],
1075 ) -> Result<(), Self::Error> {
1076 self.write_read(address, write, read).await 1050 self.write_read(address, write, read).await
1077 } 1051 }
1078 1052
1079 async fn transaction<'a, 'b>( 1053 async fn transaction(
1080 &'a mut self, 1054 &mut self,
1081 address: u8, 1055 address: u8,
1082 operations: &'a mut [embedded_hal_1::i2c::Operation<'b>], 1056 operations: &mut [embedded_hal_1::i2c::Operation<'_>],
1083 ) -> Result<(), Self::Error> { 1057 ) -> Result<(), Self::Error> {
1084 let _ = address; 1058 let _ = address;
1085 let _ = operations; 1059 let _ = operations;