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-rw-r--r--examples/boot/bootloader/rp/src/main.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/boot/bootloader/rp/src/main.rs b/examples/boot/bootloader/rp/src/main.rs
index 25b1657b8..7ebefd374 100644
--- a/examples/boot/bootloader/rp/src/main.rs
+++ b/examples/boot/bootloader/rp/src/main.rs
@@ -34,8 +34,8 @@ fn main() -> ! {
34 unsafe { bl.load(embassy_rp::flash::FLASH_BASE as u32 + active_offset) } 34 unsafe { bl.load(embassy_rp::flash::FLASH_BASE as u32 + active_offset) }
35} 35}
36 36
37#[no_mangle] 37#[unsafe(no_mangle)]
38#[cfg_attr(target_os = "none", link_section = ".HardFault.user")] 38#[cfg_attr(target_os = "none", unsafe(link_section = ".HardFault.user"))]
39unsafe extern "C" fn HardFault() { 39unsafe extern "C" fn HardFault() {
40 cortex_m::peripheral::SCB::sys_reset(); 40 cortex_m::peripheral::SCB::sys_reset();
41} 41}
@@ -43,7 +43,7 @@ unsafe extern "C" fn HardFault() {
43#[exception] 43#[exception]
44unsafe fn DefaultHandler(_: i16) -> ! { 44unsafe fn DefaultHandler(_: i16) -> ! {
45 const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32; 45 const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;
46 let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16; 46 let irqn = unsafe { core::ptr::read_volatile(SCB_ICSR) } as u8 as i16 - 16;
47 47
48 panic!("DefaultHandler #{:?}", irqn); 48 panic!("DefaultHandler #{:?}", irqn);
49} 49}