aboutsummaryrefslogtreecommitdiff
path: root/examples/boot/bootloader/stm32wba-dfu/src
diff options
context:
space:
mode:
Diffstat (limited to 'examples/boot/bootloader/stm32wba-dfu/src')
-rw-r--r--examples/boot/bootloader/stm32wba-dfu/src/main.rs6
1 files changed, 3 insertions, 3 deletions
diff --git a/examples/boot/bootloader/stm32wba-dfu/src/main.rs b/examples/boot/bootloader/stm32wba-dfu/src/main.rs
index 75d8d4199..e4aacbca9 100644
--- a/examples/boot/bootloader/stm32wba-dfu/src/main.rs
+++ b/examples/boot/bootloader/stm32wba-dfu/src/main.rs
@@ -138,8 +138,8 @@ fn main() -> ! {
138 unsafe { bl.load(BANK1_REGION.base + active_offset) } 138 unsafe { bl.load(BANK1_REGION.base + active_offset) }
139} 139}
140 140
141#[no_mangle] 141#[unsafe(no_mangle)]
142#[cfg_attr(target_os = "none", link_section = ".HardFault.user")] 142#[cfg_attr(target_os = "none", unsafe(link_section = ".HardFault.user"))]
143unsafe extern "C" fn HardFault() { 143unsafe extern "C" fn HardFault() {
144 cortex_m::peripheral::SCB::sys_reset(); 144 cortex_m::peripheral::SCB::sys_reset();
145} 145}
@@ -147,7 +147,7 @@ unsafe extern "C" fn HardFault() {
147#[exception] 147#[exception]
148unsafe fn DefaultHandler(_: i16) -> ! { 148unsafe fn DefaultHandler(_: i16) -> ! {
149 const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32; 149 const SCB_ICSR: *const u32 = 0xE000_ED04 as *const u32;
150 let irqn = core::ptr::read_volatile(SCB_ICSR) as u8 as i16 - 16; 150 let irqn = unsafe { core::ptr::read_volatile(SCB_ICSR) } as u8 as i16 - 16;
151 151
152 panic!("DefaultHandler #{:?}", irqn); 152 panic!("DefaultHandler #{:?}", irqn);
153} 153}